llvm-project/llvm/test/CodeGen
Sam Parker a0c1dcc318 [ARM] Remove MVEDomain from VLDR/STR of P0
Remove the domain from the instructions and create a shouldInspect
helper for LowOverheadLoops which queries it or a vpr operand.

Differential Revision: https://reviews.llvm.org/D87900
2020-09-22 09:05:50 +01:00
..
AArch64 [AArch64][GlobalISel] Merge selection of vector-vector G_ASHR/G_LSHR and support more cases. 2020-09-21 16:04:52 -07:00
AMDGPU Reapply Revert "RegAllocFast: Rewrite and improve" 2020-09-21 15:45:27 -04:00
ARC [ARC] Update brcc test. 2020-08-28 17:07:25 -07:00
ARM Reapply Revert "RegAllocFast: Rewrite and improve" 2020-09-21 15:45:27 -04:00
AVR
BPF
Generic [Intrinsics] define semantics for experimental fmax/fmin vector reductions 2020-09-12 09:10:28 -04:00
Hexagon Reapply Revert "RegAllocFast: Rewrite and improve" 2020-09-21 15:45:27 -04:00
Inputs
Lanai
MIR [MIRVRegNamer] Experimental MachineInstr stable hashing (Fowler-Noll-Vo) 2020-09-03 16:13:09 -04:00
MSP430
Mips Reapply Revert "RegAllocFast: Rewrite and improve" 2020-09-21 15:45:27 -04:00
NVPTX [NVPTX] Fix typo in lit test 2020-08-17 16:02:11 -04:00
PowerPC Reapply Revert "RegAllocFast: Rewrite and improve" 2020-09-21 15:45:27 -04:00
RISCV [RISCV] Support Shadow Call Stack 2020-09-17 16:02:35 -07:00
SPARC Reapply Revert "RegAllocFast: Rewrite and improve" 2020-09-21 15:45:27 -04:00
SystemZ Reapply Revert "RegAllocFast: Rewrite and improve" 2020-09-21 15:45:27 -04:00
Thumb
Thumb2 [ARM] Remove MVEDomain from VLDR/STR of P0 2020-09-22 09:05:50 +01:00
VE [VE] Support f128 2020-08-17 17:26:52 +09:00
WebAssembly [WebAssembly] Fix fixEndsAtEndOfFunction for try-catch 2020-09-08 09:27:40 -07:00
WinCFGuard
WinEH
X86 [CodeGen] [WinException] Only produce handler data at the end of the function if needed 2020-09-21 23:42:59 +03:00
XCore