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llvm-project/llvm/test/CodeGen/Mips/tailcall
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Stefan Maksimovic dc66ae78c6 [SelectionDAG] Provide adequate register class for RegisterSDNode 
When adding operands to machine instructions in case of
RegisterSDNodes, generate a COPY node in case the register class
does not match the one in the instruction definition.

Differental Revision: https://reviews.llvm.org/D35561

llvm-svn: 324733
 		2018-02-09 13:55:25 +00:00
..
tail-call-arguments-clobber.ll [mips] Restrict tail call optimization 2016-11-20 21:23:08 +00:00
tailcall-wrong-isa.ll [mips] Recommit: "N64 static relocation model support" 2017-01-27 11:36:52 +00:00
tailcall.ll [SelectionDAG] Provide adequate register class for RegisterSDNode 2018-02-09 13:55:25 +00:00