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llvm-project/llvm/test/CodeGen
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Tim Renouf 8234b4893a [AMDGPU] stop buffer_store being moved illegally 
Summary:
The machine instruction scheduler was illegally moving a buffer store
past a buffer load with the same descriptor and offset. Fixed by marking
buffer ops as mayAlias and isAliased. This may be overly conservative,
and we may need to revisit.

Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D43332

Change-Id: Iff3173d9e0653e830474546276ab9d30318b8ef7
llvm-svn: 325567
 		2018-02-20 10:03:38 +00:00
..
AArch64 [AArch64][GlobalISel] When copying from a gpr32 to an fpr16 reg, convert to fpr32 first. 2018-02-20 05:11:57 +00:00
AMDGPU [AMDGPU] stop buffer_store being moved illegally 2018-02-20 10:03:38 +00:00
ARC
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ARM [CodeGen] Fix tests breaking after r325505 2018-02-19 15:51:17 +00:00
AVR [CodeGen] Unify the syntax of MBB successors in MIR and -debug output 2018-02-09 00:10:31 +00:00
BPF [BPF] Return true in enableMultipleCopyHints(). 2018-02-18 10:09:54 +00:00
Generic Made test dbg_value_fastisel.ll specific to AArch64 fast-isel. 2018-02-17 17:43:24 +00:00
Hexagon [Hexagon] Fix lowering of formal arguments after r324737 2018-02-15 15:47:53 +00:00
Inputs
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Lanai Followup on Proposal to move MIR physical register namespace to '$' sigil. 2018-01-31 22:04:26 +00:00
MIR [GISel]: Verify COPIES involving generic registers. 2018-02-09 01:27:23 +00:00
MSP430 Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
Mips Revert "[MachineCopyPropagation] Extend pass to do COPY source forwarding" 2018-02-17 03:05:33 +00:00
NVPTX [DAGCombiner] Call ExtendUsesToFormExtLoad in (zext (and (load)))->(and (zextload)) even when the and does not have multiple uses 2018-02-15 20:20:32 +00:00
Nios2 [Nios2] Arithmetic instructions for R1 and R2 ISA. 2018-01-09 11:15:08 +00:00
PowerPC Revert "[MachineCopyPropagation] Extend pass to do COPY source forwarding" 2018-02-17 03:05:33 +00:00
RISCV [RISCV] Revert r324172 now r323991 was reverted 2018-02-17 18:17:47 +00:00
SPARC Revert "[MachineCopyPropagation] Extend pass to do COPY source forwarding" 2018-02-17 03:05:33 +00:00
SystemZ Revert "[MachineCopyPropagation] Extend pass to do COPY source forwarding" 2018-02-17 03:05:33 +00:00
Thumb Revert "[MachineCopyPropagation] Extend pass to do COPY source forwarding" 2018-02-17 03:05:33 +00:00
Thumb2 [ARM] Return true in enableMultipleCopyHints(). 2018-02-16 09:51:01 +00:00
WebAssembly [WebAssembly] Add mechanisms for specifying an explicit import module name. 2018-02-09 23:13:22 +00:00
WinCFGuard Reland "Emit Function IDs table for Control Flow Guard" 2018-01-09 23:49:30 +00:00
WinEH
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X86 [X86] Add 512-bit unmasked pmulhrsw/pmulhw/pmulhuw intrinsics. Remove and auto upgrade 128/256/512 bit masked pmulhrsw/pmulhw/pmulhuw intrinsics. 2018-02-20 07:28:14 +00:00
XCore Emit smaller exception tables for non-SJLJ mode. 2018-02-09 17:13:37 +00:00