| .. |
|
AArch64
|
[AArch64][RegisterBankInfo] Change the default mapping of fp loads.
|
2017-05-08 18:16:31 +00:00 |
|
AMDGPU
|
[AMDGPU] In the new waitcnt insertion pass, use getHeader
|
2017-05-05 21:10:17 +00:00 |
|
ARM
|
ARM: use divmod libcalls on embedded MachO platforms too.
|
2017-05-08 20:00:14 +00:00 |
|
AVR
|
[AVR] Reserve the Y register in all functions
|
2017-05-03 11:56:01 +00:00 |
|
BPF
|
[bpf] fix a bug which causes incorrect big endian reloc fixup
|
2017-05-05 18:05:00 +00:00 |
|
Generic
|
[Hexagon] Unxfail passing tests
|
2017-04-13 16:05:35 +00:00 |
|
Hexagon
|
[RDF] Remove covered parts of reached uses for phi and use in same block
|
2017-05-05 22:10:32 +00:00 |
|
Inputs
|
…
|
|
|
Lanai
|
…
|
|
|
MIR
|
Add missing target triple to test
|
2017-05-05 21:50:26 +00:00 |
|
MSP430
|
[MSP430] Fix PR32769: Select8 and Select16 need to have SR in Uses.
|
2017-04-26 00:33:59 +00:00 |
|
Mips
|
Revert "[MIPS] Add support to match more patterns for DINS instruction"
|
2017-05-09 13:18:48 +00:00 |
|
NVPTX
|
[SelectionDAG] Improve support for promotion of <1 x fX> floating point argument types (PR31088)
|
2017-05-02 10:33:08 +00:00 |
|
PowerPC
|
[PPC] When restoring R30 (PIC base pointer), mark it as <def>
|
2017-05-04 19:14:54 +00:00 |
|
SPARC
|
Don't emit CFI instructions at the end of a function
|
2017-04-24 18:45:59 +00:00 |
|
SystemZ
|
[SystemZ] Make copyPhysReg() add impl-use operands of super reg.
|
2017-05-04 13:33:30 +00:00 |
|
Thumb
|
[ARM] ScheduleDAGRRList::DelayForLiveRegsBottomUp must consider OptionalDefs
|
2017-04-23 06:58:08 +00:00 |
|
Thumb2
|
Add address space mangling to lifetime intrinsics
|
2017-04-10 20:18:21 +00:00 |
|
WebAssembly
|
[WebAssembly] Fix WebAssemblyOptimizeReturned after r300367
|
2017-04-17 21:40:28 +00:00 |
|
WinEH
|
…
|
|
|
X86
|
[X86][SSE42] Lower v2i64/v4i64 ASHR(X, 63) as PCMPGTQ(0, X)
|
2017-05-09 13:14:40 +00:00 |
|
XCore
|
In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled.
|
2017-03-14 00:34:14 +00:00 |
659c43f11a