forked from OSchip/llvm-project
140 lines
5.0 KiB
LLVM
140 lines
5.0 KiB
LLVM
;
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; There should be just a single copy of each loop when strictest mutiplier
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; candidates formula (unscaled candidates == 0) is enforced:
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; RUN: opt < %s -enable-nontrivial-unswitch -enable-unswitch-cost-multiplier=true \
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; RUN: -unswitch-num-initial-unscaled-candidates=0 -unswitch-siblings-toplevel-div=1 \
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; RUN: -passes='loop(unswitch),print<loops>' -disable-output 2>&1 | FileCheck %s --check-prefixes=LOOP1
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;
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; RUN: opt < %s -enable-nontrivial-unswitch -enable-unswitch-cost-multiplier=true \
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; RUN: -unswitch-num-initial-unscaled-candidates=0 -unswitch-siblings-toplevel-div=16 \
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; RUN: -passes='loop(unswitch),print<loops>' -disable-output 2>&1 | FileCheck %s --check-prefixes=LOOP1
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;
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;
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; When we relax the candidates part of a multiplier formula
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; (unscaled candidates == 4) we start getting some unswitches,
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; which leads to siblings multiplier kicking in.
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;
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; RUN: opt < %s -enable-nontrivial-unswitch -enable-unswitch-cost-multiplier=true \
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; RUN: -unswitch-num-initial-unscaled-candidates=4 -unswitch-siblings-toplevel-div=1 \
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; RUN: -passes='loop(unswitch),print<loops>' -disable-output 2>&1 | \
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; RUN: sort -b -k 1 | FileCheck %s --check-prefixes=LOOP-UNSCALE4-DIV1
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;
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; NB: sort -b is essential here and below, otherwise blanks might lead to different
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; order depending on locale.
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;
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; RUN: opt < %s -enable-nontrivial-unswitch -enable-unswitch-cost-multiplier=true \
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; RUN: -unswitch-num-initial-unscaled-candidates=4 -unswitch-siblings-toplevel-div=2 \
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; RUN: -passes='loop(unswitch),print<loops>' -disable-output 2>&1 | \
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; RUN: sort -b -k 1 | FileCheck %s --check-prefixes=LOOP-UNSCALE4-DIV2
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;
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;
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; Get
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; 2^(num conds) == 2^5 = 32
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; loop nests when cost multiplier is disabled:
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;
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; RUN: opt < %s -enable-nontrivial-unswitch -enable-unswitch-cost-multiplier=false \
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; RUN: -passes='loop(unswitch),print<loops>' -disable-output 2>&1 | \
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; RUN: sort -b -k 1 | FileCheck %s --check-prefixes=LOOP32
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;
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; Single loop nest, not unswitched
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; LOOP1: Loop at depth 1 containing:
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; LOOP1: Loop at depth 2 containing:
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; LOOP1: Loop at depth 3 containing:
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; LOOP1-NOT: Loop at depth {{[0-9]+}} containing:
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;
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; Half unswitched loop nests, with unscaled4 and div1 it gets less depth1 loops unswitched
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; since they have more cost.
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; LOOP-UNSCALE4-DIV1-COUNT-6: Loop at depth 1 containing:
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; LOOP-UNSCALE4-DIV1-COUNT-19: Loop at depth 2 containing:
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; LOOP-UNSCALE4-DIV1-COUNT-29: Loop at depth 3 containing:
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; LOOP-UNSCALE4-DIV1-NOT: Loop at depth {{[0-9]+}} containing:
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;
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; Half unswitched loop nests, with unscaled4 and div2 it gets more depth1 loops unswitched
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; as div2 kicks in.
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; LOOP-UNSCALE4-DIV2-COUNT-11: Loop at depth 1 containing:
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; LOOP-UNSCALE4-DIV2-COUNT-22: Loop at depth 2 containing:
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; LOOP-UNSCALE4-DIV2-COUNT-29: Loop at depth 3 containing:
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; LOOP-UNSCALE4-DIV2-NOT: Loop at depth {{[0-9]+}} containing:
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;
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; 32 loop nests, fully unswitched
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; LOOP32-COUNT-32: Loop at depth 1 containing:
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; LOOP32-COUNT-32: Loop at depth 2 containing:
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; LOOP32-COUNT-32: Loop at depth 3 containing:
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; LOOP32-NOT: Loop at depth {{[0-9]+}} containing:
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declare void @bar()
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define void @loop_nested3_conds5(i32* %addr, i1 %c1, i1 %c2, i1 %c3, i1 %c4, i1 %c5) {
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entry:
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%addr1 = getelementptr i32, i32* %addr, i64 0
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%addr2 = getelementptr i32, i32* %addr, i64 1
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%addr3 = getelementptr i32, i32* %addr, i64 2
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br label %outer
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outer:
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%iv1 = phi i32 [0, %entry], [%iv1.next, %outer_latch]
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%iv1.next = add i32 %iv1, 1
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;; skip nontrivial unswitch
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call void @bar()
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br label %middle
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middle:
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%iv2 = phi i32 [0, %outer], [%iv2.next, %middle_latch]
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%iv2.next = add i32 %iv2, 1
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;; skip nontrivial unswitch
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call void @bar()
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br label %loop
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loop:
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%iv3 = phi i32 [0, %middle], [%iv3.next, %loop_latch]
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%iv3.next = add i32 %iv3, 1
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;; skip nontrivial unswitch
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call void @bar()
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br i1 %c1, label %loop_next1_left, label %loop_next1_right
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loop_next1_left:
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br label %loop_next1
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loop_next1_right:
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br label %loop_next1
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loop_next1:
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br i1 %c2, label %loop_next2_left, label %loop_next2_right
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loop_next2_left:
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br label %loop_next2
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loop_next2_right:
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br label %loop_next2
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loop_next2:
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br i1 %c3, label %loop_next3_left, label %loop_next3_right
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loop_next3_left:
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br label %loop_next3
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loop_next3_right:
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br label %loop_next3
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loop_next3:
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br i1 %c4, label %loop_next4_left, label %loop_next4_right
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loop_next4_left:
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br label %loop_next4
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loop_next4_right:
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br label %loop_next4
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loop_next4:
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br i1 %c5, label %loop_latch_left, label %loop_latch_right
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loop_latch_left:
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br label %loop_latch
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loop_latch_right:
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br label %loop_latch
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loop_latch:
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store volatile i32 0, i32* %addr1
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%test_loop = icmp slt i32 %iv3, 50
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br i1 %test_loop, label %loop, label %middle_latch
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middle_latch:
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store volatile i32 0, i32* %addr2
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%test_middle = icmp slt i32 %iv2, 50
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br i1 %test_middle, label %middle, label %outer_latch
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outer_latch:
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store volatile i32 0, i32* %addr3
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%test_outer = icmp slt i32 %iv1, 50
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br i1 %test_outer, label %outer, label %exit
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exit:
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ret void
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}
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