forked from OSchip/llvm-project
279 lines
9.5 KiB
YAML
279 lines
9.5 KiB
YAML
# RUN: llc -mtriple arm-linux-gnueabihf -mattr=+vfp2 -float-abi=hard -global-isel -run-pass=legalizer %s -o - | FileCheck %s -check-prefix CHECK -check-prefix HARD
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# RUN: llc -mtriple arm-linux-gnueabi -mattr=+vfp2,+soft-float -float-abi=soft -global-isel -run-pass=legalizer %s -o - | FileCheck %s -check-prefix CHECK -check-prefix SOFT -check-prefix SOFT-AEABI
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# RUN: llc -mtriple arm-linux-gnu -mattr=+soft-float -float-abi=soft -global-isel -run-pass=legalizer %s -o - | FileCheck %s -check-prefix CHECK -check-prefix SOFT -check-prefix SOFT-DEFAULT
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--- |
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define void @test_frem_float() { ret void }
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define void @test_frem_double() { ret void }
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define void @test_fpow_float() { ret void }
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define void @test_fpow_double() { ret void }
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define void @test_fadd_float() { ret void }
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define void @test_fadd_double() { ret void }
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...
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---
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name: test_frem_float
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# CHECK-LABEL: name: test_frem_float
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legalized: false
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# CHECK: legalized: true
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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body: |
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bb.0:
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liveins: %r0, %r1
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; CHECK-DAG: [[X:%[0-9]+]](s32) = COPY %r0
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; CHECK-DAG: [[Y:%[0-9]+]](s32) = COPY %r1
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%0(s32) = COPY %r0
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%1(s32) = COPY %r1
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; CHECK: ADJCALLSTACKDOWN
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; SOFT-DAG: %r0 = COPY [[X]]
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; SOFT-DAG: %r1 = COPY [[Y]]
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; HARD-DAG: %s0 = COPY [[X]]
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; HARD-DAG: %s1 = COPY [[Y]]
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; SOFT: BLX $fmodf, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0
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; HARD: BLX $fmodf, {{.*}}, implicit %s0, implicit %s1, implicit-def %s0
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; SOFT: [[R:%[0-9]+]](s32) = COPY %r0
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; HARD: [[R:%[0-9]+]](s32) = COPY %s0
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; CHECK: ADJCALLSTACKUP
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%2(s32) = G_FREM %0, %1
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; CHECK: %r0 = COPY [[R]]
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%r0 = COPY %2(s32)
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BX_RET 14, _, implicit %r0
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...
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---
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name: test_frem_double
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# CHECK-LABEL: name: test_frem_double
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legalized: false
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# CHECK: legalized: true
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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- { id: 3, class: _ }
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- { id: 4, class: _ }
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- { id: 5, class: _ }
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- { id: 6, class: _ }
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- { id: 7, class: _ }
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- { id: 8, class: _ }
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body: |
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bb.0:
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liveins: %r0, %r1, %r2, %r3
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; The inputs may be in the wrong order (depending on the target's
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; endianness), but that's orthogonal to what we're trying to test here.
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; For soft float, we only need to check that the first value, received
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; through R0-R1, ends up in R0-R1 or R1-R0, and the second value, received
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; through R2-R3, ends up in R2-R3 or R3-R2, when passed to fmod.
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; For hard float, the values need to end up in D0 and D1.
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; CHECK-DAG: [[X0:%[0-9]+]](s32) = COPY %r0
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; CHECK-DAG: [[X1:%[0-9]+]](s32) = COPY %r1
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; CHECK-DAG: [[Y0:%[0-9]+]](s32) = COPY %r2
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; CHECK-DAG: [[Y1:%[0-9]+]](s32) = COPY %r3
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%0(s32) = COPY %r0
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%1(s32) = COPY %r1
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%2(s32) = COPY %r2
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%3(s32) = COPY %r3
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; HARD-DAG: [[X:%[0-9]+]](s64) = G_MERGE_VALUES [[X0]]
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; HARD-DAG: [[Y:%[0-9]+]](s64) = G_MERGE_VALUES [[Y0]]
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%4(s64) = G_MERGE_VALUES %0(s32), %1(s32)
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%5(s64) = G_MERGE_VALUES %2(s32), %3(s32)
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; CHECK: ADJCALLSTACKDOWN
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; SOFT-DAG: %r{{[0-1]}} = COPY [[X0]]
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; SOFT-DAG: %r{{[0-1]}} = COPY [[X1]]
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; SOFT-DAG: %r{{[2-3]}} = COPY [[Y0]]
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; SOFT-DAG: %r{{[2-3]}} = COPY [[Y1]]
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; HARD-DAG: %d0 = COPY [[X]]
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; HARD-DAG: %d1 = COPY [[Y]]
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; SOFT: BLX $fmod, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0, implicit-def %r1
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; HARD: BLX $fmod, {{.*}}, implicit %d0, implicit %d1, implicit-def %d0
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; CHECK: ADJCALLSTACKUP
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%6(s64) = G_FREM %4, %5
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%7(s32), %8(s32) = G_UNMERGE_VALUES %6(s64)
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%r0 = COPY %7(s32)
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%r1 = COPY %8(s32)
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BX_RET 14, _, implicit %r0, implicit %r1
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...
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---
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name: test_fpow_float
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# CHECK-LABEL: name: test_fpow_float
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legalized: false
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# CHECK: legalized: true
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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body: |
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bb.0:
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liveins: %r0, %r1
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; CHECK-DAG: [[X:%[0-9]+]](s32) = COPY %r0
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; CHECK-DAG: [[Y:%[0-9]+]](s32) = COPY %r1
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%0(s32) = COPY %r0
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%1(s32) = COPY %r1
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; CHECK: ADJCALLSTACKDOWN
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; SOFT-DAG: %r0 = COPY [[X]]
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; SOFT-DAG: %r1 = COPY [[Y]]
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; HARD-DAG: %s0 = COPY [[X]]
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; HARD-DAG: %s1 = COPY [[Y]]
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; SOFT: BLX $powf, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0
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; HARD: BLX $powf, {{.*}}, implicit %s0, implicit %s1, implicit-def %s0
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; SOFT: [[R:%[0-9]+]](s32) = COPY %r0
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; HARD: [[R:%[0-9]+]](s32) = COPY %s0
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; CHECK: ADJCALLSTACKUP
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%2(s32) = G_FPOW %0, %1
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; CHECK: %r0 = COPY [[R]]
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%r0 = COPY %2(s32)
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BX_RET 14, _, implicit %r0
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...
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---
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name: test_fpow_double
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# CHECK-LABEL: name: test_fpow_double
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legalized: false
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# CHECK: legalized: true
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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- { id: 3, class: _ }
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- { id: 4, class: _ }
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- { id: 5, class: _ }
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- { id: 6, class: _ }
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- { id: 7, class: _ }
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- { id: 8, class: _ }
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body: |
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bb.0:
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liveins: %r0, %r1, %r2, %r3
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; The inputs may be in the wrong order (depending on the target's
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; endianness), but that's orthogonal to what we're trying to test here.
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; For soft float, we only need to check that the first value, received
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; through R0-R1, ends up in R0-R1 or R1-R0, and the second value, received
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; through R2-R3, ends up in R2-R3 or R3-R2, when passed to pow.
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; For hard float, the values need to end up in D0 and D1.
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; CHECK-DAG: [[X0:%[0-9]+]](s32) = COPY %r0
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; CHECK-DAG: [[X1:%[0-9]+]](s32) = COPY %r1
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; CHECK-DAG: [[Y0:%[0-9]+]](s32) = COPY %r2
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; CHECK-DAG: [[Y1:%[0-9]+]](s32) = COPY %r3
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%0(s32) = COPY %r0
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%1(s32) = COPY %r1
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%2(s32) = COPY %r2
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%3(s32) = COPY %r3
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; HARD-DAG: [[X:%[0-9]+]](s64) = G_MERGE_VALUES [[X0]]
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; HARD-DAG: [[Y:%[0-9]+]](s64) = G_MERGE_VALUES [[Y0]]
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%4(s64) = G_MERGE_VALUES %0(s32), %1(s32)
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%5(s64) = G_MERGE_VALUES %2(s32), %3(s32)
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; CHECK: ADJCALLSTACKDOWN
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; SOFT-DAG: %r{{[0-1]}} = COPY [[X0]]
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; SOFT-DAG: %r{{[0-1]}} = COPY [[X1]]
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; SOFT-DAG: %r{{[2-3]}} = COPY [[Y0]]
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; SOFT-DAG: %r{{[2-3]}} = COPY [[Y1]]
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; HARD-DAG: %d0 = COPY [[X]]
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; HARD-DAG: %d1 = COPY [[Y]]
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; SOFT: BLX $pow, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0, implicit-def %r1
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; HARD: BLX $pow, {{.*}}, implicit %d0, implicit %d1, implicit-def %d0
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; CHECK: ADJCALLSTACKUP
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%6(s64) = G_FPOW %4, %5
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%7(s32), %8(s32) = G_UNMERGE_VALUES %6(s64)
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%r0 = COPY %7(s32)
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%r1 = COPY %8(s32)
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BX_RET 14, _, implicit %r0, implicit %r1
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...
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---
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name: test_fadd_float
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# CHECK-LABEL: name: test_fadd_float
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legalized: false
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# CHECK: legalized: true
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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body: |
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bb.0:
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liveins: %r0, %r1
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; CHECK-DAG: [[X:%[0-9]+]](s32) = COPY %r0
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; CHECK-DAG: [[Y:%[0-9]+]](s32) = COPY %r1
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%0(s32) = COPY %r0
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%1(s32) = COPY %r1
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; HARD: [[R:%[0-9]+]](s32) = G_FADD [[X]], [[Y]]
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; SOFT: ADJCALLSTACKDOWN
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; SOFT-DAG: %r0 = COPY [[X]]
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; SOFT-DAG: %r1 = COPY [[Y]]
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; SOFT-AEABI: BLX $__aeabi_fadd, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0
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; SOFT-DEFAULT: BLX $__addsf3, {{.*}}, implicit %r0, implicit %r1, implicit-def %r0
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; SOFT: [[R:%[0-9]+]](s32) = COPY %r0
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; SOFT: ADJCALLSTACKUP
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%2(s32) = G_FADD %0, %1
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; CHECK: %r0 = COPY [[R]]
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%r0 = COPY %2(s32)
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BX_RET 14, _, implicit %r0
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...
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---
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name: test_fadd_double
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# CHECK-LABEL: name: test_fadd_double
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legalized: false
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# CHECK: legalized: true
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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- { id: 3, class: _ }
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- { id: 4, class: _ }
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- { id: 5, class: _ }
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- { id: 6, class: _ }
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- { id: 7, class: _ }
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- { id: 8, class: _ }
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body: |
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bb.0:
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liveins: %r0, %r1, %r2, %r3
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; CHECK-DAG: [[X0:%[0-9]+]](s32) = COPY %r0
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; CHECK-DAG: [[X1:%[0-9]+]](s32) = COPY %r1
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; CHECK-DAG: [[Y0:%[0-9]+]](s32) = COPY %r2
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; CHECK-DAG: [[Y1:%[0-9]+]](s32) = COPY %r3
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%0(s32) = COPY %r0
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%1(s32) = COPY %r1
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%2(s32) = COPY %r2
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%3(s32) = COPY %r3
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; HARD-DAG: [[X:%[0-9]+]](s64) = G_MERGE_VALUES [[X0]]
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; HARD-DAG: [[Y:%[0-9]+]](s64) = G_MERGE_VALUES [[Y0]]
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%4(s64) = G_MERGE_VALUES %0(s32), %1(s32)
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%5(s64) = G_MERGE_VALUES %2(s32), %3(s32)
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; HARD: [[R:%[0-9]+]](s64) = G_FADD [[X]], [[Y]]
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; SOFT: ADJCALLSTACKDOWN
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; SOFT-DAG: %r{{[0-1]}} = COPY [[X0]]
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; SOFT-DAG: %r{{[0-1]}} = COPY [[X1]]
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; SOFT-DAG: %r{{[2-3]}} = COPY [[Y0]]
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; SOFT-DAG: %r{{[2-3]}} = COPY [[Y1]]
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; SOFT-AEABI: BLX $__aeabi_dadd, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0, implicit-def %r1
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; SOFT-DEFAULT: BLX $__adddf3, {{.*}}, implicit %r0, implicit %r1, implicit %r2, implicit %r3, implicit-def %r0, implicit-def %r1
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; SOFT: ADJCALLSTACKUP
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%6(s64) = G_FADD %4, %5
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; HARD-DAG: G_UNMERGE_VALUES [[R]](s64)
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%7(s32),%8(s32) = G_UNMERGE_VALUES %6(s64)
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%r0 = COPY %7(s32)
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%r1 = COPY %8(s32)
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BX_RET 14, _, implicit %r0, implicit %r1
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...
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