forked from OSchip/llvm-project
621894ac76
Add support throughout the pipeline: - mark as legal for s32 and pointers - map to GPRs - lower to a sequence of instructions, which moves 0 or 1 into the result register based on the flags set by a CMPrr We have copied from FastISel a helper function which maps CmpInst predicates into ARMCC codes. Ideally, we should be able to move it somewhere that both FastISel and GlobalISel can use. llvm-svn: 305672 |
||
|---|---|---|
| .. | ||
| arm-instruction-select-cmp.mir | ||
| arm-instruction-select-combos.mir | ||
| arm-instruction-select.mir | ||
| arm-irtranslator.ll | ||
| arm-isel-divmod.ll | ||
| arm-isel-fp.ll | ||
| arm-isel.ll | ||
| arm-legalize-divmod.mir | ||
| arm-legalize-fp.mir | ||
| arm-legalizer.mir | ||
| arm-regbankselect.mir | ||
| arm-unsupported.ll | ||
| lit.local.cfg | ||