llvm-project/llvm/test/CodeGen
Sanjay Patel 625d5aef62 [DAGCombiner] fold insert_subvector of insert_subvector
This pattern:

    t33: v8i32 = insert_subvector undef:v8i32, t35, Constant:i64<0>
  t21: v16i32 = insert_subvector undef:v16i32, t33, Constant:i64<0>

...shows up in PR33758:
https://bugs.llvm.org/show_bug.cgi?id=33758
...although this patch doesn't make any difference to the final result on that yet.

In the affected tests here, it looks like it just makes RA wiggle. But we might 
as well squash this to prevent it interfering with other pattern-matching.

Differential Revision:
https://reviews.llvm.org/D56604

llvm-svn: 351008
2019-01-12 15:12:28 +00:00
..
AArch64 [X86][AARCH64] Improve ISD::ABS support 2019-01-12 09:59:32 +00:00
AMDGPU [AMDGPU] Fix dwordx3/southern-islands failures. 2019-01-10 16:21:08 +00:00
ARC
ARM [AArch64] Create feature set for Exynos M4 2019-01-11 18:54:25 +00:00
AVR [AVR] Update integration/blink.ll as we now generate sbi/cbi instructions. 2019-01-03 21:25:39 +00:00
BPF [BPF] Fix .BTF.ext reloc type assigment issue 2019-01-08 16:36:06 +00:00
Generic Move llc-start-stop-instance to x86 2018-12-04 18:19:08 +00:00
Hexagon [DAGCombiner] allow narrowing of add followed by truncate 2018-12-22 17:10:31 +00:00
Inputs
Lanai [Targets] Add errors for tiny and kernel codemodel on targets that don't support them 2018-12-07 12:10:23 +00:00
MIR [Dwarf/AArch64] Return address signing B key dwarf support 2018-12-21 10:45:08 +00:00
MSP430 [MSP430] Add missing instruction forms 2019-01-10 22:54:53 +00:00
Mips [llvm-objdump] - Implement -z/--disassemble-zeroes. 2019-01-10 14:55:26 +00:00
NVPTX Python compat - print statement 2019-01-03 14:11:33 +00:00
Nios2
PowerPC Recommit "[PowerPC] Fix assert from machine verify pass that unmatched register class about fcmp selection in fast-isel" 2019-01-10 06:20:14 +00:00
RISCV [RISCV] Introduce codegen patterns for RV64M-only instructions 2019-01-12 07:43:06 +00:00
SPARC [Sparc] Use float register for integer constrained with "f" in inline asm 2018-12-13 15:13:29 +00:00
SystemZ Pythran compat - range vs. xrange 2019-01-03 14:11:58 +00:00
Thumb [ARM] Complete the Thumb1 shift+and->shift+shift transforms. 2018-12-20 23:39:54 +00:00
Thumb2 [ARM] Size reduce teq to eors 2019-01-10 08:36:33 +00:00
WebAssembly [WebAssembly] Fix stack pointer store check in RegStackify 2019-01-10 23:12:07 +00:00
WinCFGuard
WinEH
X86 [DAGCombiner] fold insert_subvector of insert_subvector 2019-01-12 15:12:28 +00:00
XCore [Targets] Add errors for tiny and kernel codemodel on targets that don't support them 2018-12-07 12:10:23 +00:00