llvm-project/llvm/test/CodeGen
Artyom Skrobov 7fd67e25aa Adding support for TargetLoweringBase::LibCall
Summary:
TargetLoweringBase::Expand is defined as "Try to expand this to other ops,
otherwise use a libcall." For ISD::UDIV and ISD::SDIV, the choice between
the two possibilities was defined in a rather convoluted way:

- if DIVREM is legal, expand to DIVREM
- if DIVREM has a custom lowering, expand to DIVREM
- if DIVREM libcall is defined and a remainder from the same division is
  computed elsewhere, expand to a DIVREM libcall
- else, expand to a DIV libcall

This had the undesirable effect that if both DIV and DIVREM are implemented
as libcalls, then ISD::UDIV and ISD::SDIV are expanded to the heavier DIVREM
libcall, even when the remainder isn't used.

The new code adds a new LegalizeAction, TargetLoweringBase::LibCall, so that
backends can directly control whether they prefer an expansion or a conversion
to a libcall. This makes the generic lowering code even more generic,
allowing its reuse in a wider range of target-specific configurations.

The useful effect is that ARM backend will now generate a call
to __aeabi_{i,u}div rather than __aeabi_{i,u}divmod in cases where
it doesn't need the remainder. There's no functional change outside
the ARM backend.

Reviewers: t.p.northover, rengolin

Subscribers: t.p.northover, llvm-commits, aemerson

Differential Revision: http://reviews.llvm.org/D13862

llvm-svn: 250826
2015-10-20 13:14:52 +00:00
..
AArch64 [AArch64]Merge halfword loads into a 32-bit load 2015-10-19 18:34:53 +00:00
AMDGPU AMDGPU: Stop reserving v[254:255] 2015-10-20 03:59:58 +00:00
ARM Adding support for TargetLoweringBase::LibCall 2015-10-20 13:14:52 +00:00
BPF [bpf] Do not expand UNDEF SDNode during insn selection lowering 2015-10-08 18:52:40 +00:00
CPP Fix CPP Backend for GEP API changes for opaque pointer types 2015-09-08 18:42:29 +00:00
Generic [Hexagon] Reverting test file change. 2015-10-17 01:58:51 +00:00
Hexagon [Hexagon] Delay emission of CFI instructions 2015-10-19 17:46:01 +00:00
Inputs DI: Require subprogram definitions to be distinct 2015-08-28 20:26:49 +00:00
MIR [mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE. 2015-10-15 14:34:23 +00:00
MSP430
Mips [mips][mips16] MIPS16 is not a CPU/Architecture but is an ASE. 2015-10-15 14:34:23 +00:00
NVPTX [NVPTX] Let NVPTX backend detect integer min and max patterns. 2015-08-26 23:22:02 +00:00
PowerPC [MachO] Stop generating *coal* sections. 2015-10-15 05:28:38 +00:00
SPARC Fix assert when emitting llvm.pow.f86. 2015-10-09 21:36:19 +00:00
SystemZ [SystemZ] CodeGen/SystemZ/asm-18.ll run with -verify-machineinstrs 2015-10-10 07:20:23 +00:00
Thumb [ARM] Modify codegen for memcpy intrinsic to prefer LDM/STM. 2015-10-05 14:49:54 +00:00
Thumb2 [ARM] Use correct half-precision functions in EABI mode 2015-10-07 16:58:49 +00:00
WebAssembly WebAssembly: fix call/return syntax. 2015-10-20 01:26:54 +00:00
WinEH [WinEH] Fix eh.exceptionpointer intrinsic lowering 2015-10-17 00:08:08 +00:00
X86 AVX512: Implemented encoding and intrinsics for VPBROADCASTB/W/D/Q instructions. 2015-10-20 11:56:42 +00:00
XCore [opaque pointer type] Add textual IR support for explicit type parameter for global aliases 2015-09-11 03:22:04 +00:00