llvm-project/llvm/lib/Target/Mips
Daniel Neilson 1e68724d24 Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1)
Summary:
 This is a resurrection of work first proposed and discussed in Aug 2015:
   http://lists.llvm.org/pipermail/llvm-dev/2015-August/089384.html
and initially landed (but then backed out) in Nov 2015:
   http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20151109/312083.html

 The @llvm.memcpy/memmove/memset intrinsics currently have an explicit argument
which is required to be a constant integer. It represents the alignment of the
dest (and source), and so must be the minimum of the actual alignment of the
two.

 This change is the first in a series that allows source and dest to each
have their own alignments by using the alignment attribute on their arguments.

 In this change we:
1) Remove the alignment argument.
2) Add alignment attributes to the source & dest arguments. We, temporarily,
   require that the alignments for source & dest be equal.

 For example, code which used to read:
  call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 100, i32 4, i1 false)
will now read
  call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %dest, i8* align 4 %src, i32 100, i1 false)

 Downstream users may have to update their lit tests that check for
@llvm.memcpy/memmove/memset call/declaration patterns. The following extended sed script
may help with updating the majority of your tests, but it does not catch all possible
patterns so some manual checking and updating will be required.

s~declare void @llvm\.mem(set|cpy|move)\.p([^(]*)\((.*), i32, i1\)~declare void @llvm.mem\1.p\2(\3, i1)~g
s~call void @llvm\.memset\.p([^(]*)i8\(i8([^*]*)\* (.*), i8 (.*), i8 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.memset.p\1i8(i8\2* \3, i8 \4, i8 \5, i1 \6)~g
s~call void @llvm\.memset\.p([^(]*)i16\(i8([^*]*)\* (.*), i8 (.*), i16 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.memset.p\1i16(i8\2* \3, i8 \4, i16 \5, i1 \6)~g
s~call void @llvm\.memset\.p([^(]*)i32\(i8([^*]*)\* (.*), i8 (.*), i32 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.memset.p\1i32(i8\2* \3, i8 \4, i32 \5, i1 \6)~g
s~call void @llvm\.memset\.p([^(]*)i64\(i8([^*]*)\* (.*), i8 (.*), i64 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.memset.p\1i64(i8\2* \3, i8 \4, i64 \5, i1 \6)~g
s~call void @llvm\.memset\.p([^(]*)i128\(i8([^*]*)\* (.*), i8 (.*), i128 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.memset.p\1i128(i8\2* \3, i8 \4, i128 \5, i1 \6)~g
s~call void @llvm\.memset\.p([^(]*)i8\(i8([^*]*)\* (.*), i8 (.*), i8 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.memset.p\1i8(i8\2* align \6 \3, i8 \4, i8 \5, i1 \7)~g
s~call void @llvm\.memset\.p([^(]*)i16\(i8([^*]*)\* (.*), i8 (.*), i16 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.memset.p\1i16(i8\2* align \6 \3, i8 \4, i16 \5, i1 \7)~g
s~call void @llvm\.memset\.p([^(]*)i32\(i8([^*]*)\* (.*), i8 (.*), i32 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.memset.p\1i32(i8\2* align \6 \3, i8 \4, i32 \5, i1 \7)~g
s~call void @llvm\.memset\.p([^(]*)i64\(i8([^*]*)\* (.*), i8 (.*), i64 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.memset.p\1i64(i8\2* align \6 \3, i8 \4, i64 \5, i1 \7)~g
s~call void @llvm\.memset\.p([^(]*)i128\(i8([^*]*)\* (.*), i8 (.*), i128 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.memset.p\1i128(i8\2* align \6 \3, i8 \4, i128 \5, i1 \7)~g
s~call void @llvm\.mem(cpy|move)\.p([^(]*)i8\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i8 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.mem\1.p\2i8(i8\3* \4, i8\5* \6, i8 \7, i1 \8)~g
s~call void @llvm\.mem(cpy|move)\.p([^(]*)i16\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i16 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.mem\1.p\2i16(i8\3* \4, i8\5* \6, i16 \7, i1 \8)~g
s~call void @llvm\.mem(cpy|move)\.p([^(]*)i32\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i32 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.mem\1.p\2i32(i8\3* \4, i8\5* \6, i32 \7, i1 \8)~g
s~call void @llvm\.mem(cpy|move)\.p([^(]*)i64\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i64 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.mem\1.p\2i64(i8\3* \4, i8\5* \6, i64 \7, i1 \8)~g
s~call void @llvm\.mem(cpy|move)\.p([^(]*)i128\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i128 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.mem\1.p\2i128(i8\3* \4, i8\5* \6, i128 \7, i1 \8)~g
s~call void @llvm\.mem(cpy|move)\.p([^(]*)i8\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i8 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.mem\1.p\2i8(i8\3* align \8 \4, i8\5* align \8 \6, i8 \7, i1 \9)~g
s~call void @llvm\.mem(cpy|move)\.p([^(]*)i16\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i16 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.mem\1.p\2i16(i8\3* align \8 \4, i8\5* align \8 \6, i16 \7, i1 \9)~g
s~call void @llvm\.mem(cpy|move)\.p([^(]*)i32\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i32 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.mem\1.p\2i32(i8\3* align \8 \4, i8\5* align \8 \6, i32 \7, i1 \9)~g
s~call void @llvm\.mem(cpy|move)\.p([^(]*)i64\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i64 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.mem\1.p\2i64(i8\3* align \8 \4, i8\5* align \8 \6, i64 \7, i1 \9)~g
s~call void @llvm\.mem(cpy|move)\.p([^(]*)i128\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i128 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.mem\1.p\2i128(i8\3* align \8 \4, i8\5* align \8 \6, i128 \7, i1 \9)~g

 The remaining changes in the series will:
Step 2) Expand the IRBuilder API to allow creation of memcpy/memmove with differing
   source and dest alignments.
Step 3) Update Clang to use the new IRBuilder API.
Step 4) Update Polly to use the new IRBuilder API.
Step 5) Update LLVM passes that create memcpy/memmove calls to use the new IRBuilder API,
        and those that use use MemIntrinsicInst::[get|set]Alignment() to use
        getDestAlignment() and getSourceAlignment() instead.
Step 6) Remove the single-alignment IRBuilder API for memcpy/memmove, and the
        MemIntrinsicInst::[get|set]Alignment() methods.

Reviewers: pete, hfinkel, lhames, reames, bollu

Reviewed By: reames

Subscribers: niosHD, reames, jholewinski, qcolombet, jfb, sanjoy, arsenm, dschuff, dylanmckay, mehdi_amini, sdardis, nemanjai, david2050, nhaehnle, javed.absar, sbc100, jgravelle-google, eraman, aheejin, kbarton, JDevlieghere, asb, rbar, johnrusso, simoncook, jordy.potman.lists, apazos, sabuasal, llvm-commits

Differential Revision: https://reviews.llvm.org/D41675

llvm-svn: 322965
2018-01-19 17:13:12 +00:00
..
AsmParser [mips] Removal of microMIPS64R6 2017-12-11 11:21:40 +00:00
Disassembler [mips] Remove duplicated R6 EVA instructions 2018-01-08 16:50:33 +00:00
InstPrinter [llvm] Remove redundant return [NFC] 2017-11-12 03:47:50 +00:00
MCTargetDesc [Mips] Handle one byte unsupported relocations 2018-01-11 10:07:47 +00:00
TargetInfo Add backend name to Target to enable runtime info to be fed back into TableGen 2017-11-15 23:55:44 +00:00
CMakeLists.txt [mips][microMIPS] Adding code size reduction pass for MicroMIPS 2017-04-27 13:10:48 +00:00
LLVMBuild.txt
MSA.txt
MicroMips32r6InstrFormats.td [mips] Remove duplicated R6 EVA instructions 2018-01-08 16:50:33 +00:00
MicroMips32r6InstrInfo.td [mips] Remove duplicated R6 EVA instructions 2018-01-08 16:50:33 +00:00
MicroMipsDSPInstrFormats.td
MicroMipsDSPInstrInfo.td [mips] Enable spilling and reloading of the dsp register set. 2017-10-03 13:45:49 +00:00
MicroMipsInstrFPU.td [mips] Fix (dis)assembly of abs.fmt for micromips 2017-10-26 11:36:54 +00:00
MicroMipsInstrFormats.td [mips][micromips] Fix (dis)assembly of bc1(t|f) 2017-10-16 14:20:22 +00:00
MicroMipsInstrInfo.td [mips] Removal of microMIPS64R6 2017-12-11 11:21:40 +00:00
MicroMipsSizeReduction.cpp [mips] Removal of microMIPS64R6 2017-12-11 11:21:40 +00:00
Mips.h [LegacyPassManager] Remove TargetMachine constructors 2017-05-18 17:21:13 +00:00
Mips.td [mips] Handle the `long-calls` feature flags in the MIPS backend 2017-07-15 07:14:25 +00:00
Mips16FrameLowering.cpp Move TargetFrameLowering.h to CodeGen where it's implemented 2017-11-03 22:32:11 +00:00
Mips16FrameLowering.h Add "Restored" flag to CalleeSavedInfo 2017-08-10 16:17:32 +00:00
Mips16HardFloat.cpp [Mips] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC). 2017-08-03 22:12:30 +00:00
Mips16HardFloatInfo.cpp
Mips16HardFloatInfo.h
Mips16ISelDAGToDAG.cpp
Mips16ISelDAGToDAG.h
Mips16ISelLowering.cpp Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layering 2017-11-08 01:01:31 +00:00
Mips16ISelLowering.h
Mips16InstrFormats.td
Mips16InstrInfo.cpp Fix a bunch more layering of CodeGen headers that are in Target 2017-11-17 01:07:10 +00:00
Mips16InstrInfo.h Teach TargetInstrInfo::getInlineAsmLength to parse .space directives with integer arguments 2017-09-28 09:31:46 +00:00
Mips16InstrInfo.td [mips] fix asmstring of Ext and Ins instructions and mips16 JALRC/JRC 2017-11-27 14:25:36 +00:00
Mips16RegisterInfo.cpp Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layering 2017-11-08 01:01:31 +00:00
Mips16RegisterInfo.h
Mips32r6InstrFormats.td
Mips32r6InstrInfo.td [mips] Fix definition of 'bc' instruction 2017-12-06 12:42:49 +00:00
Mips64InstrInfo.td [mips] Removal of microMIPS64R6 2017-12-11 11:21:40 +00:00
Mips64r6InstrInfo.td [mips] Removal of microMIPS64R6 2017-12-11 11:21:40 +00:00
MipsAnalyzeImmediate.cpp [Mips] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC). 2017-08-03 22:12:30 +00:00
MipsAnalyzeImmediate.h [Mips] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC). 2017-08-03 22:12:30 +00:00
MipsAsmPrinter.cpp MachineFunction: Return reference from getFunction(); NFC 2017-12-15 22:22:58 +00:00
MipsAsmPrinter.h [X86][Mips] Remove unused method declaration from the X86 and Mips AsmPrinters. 2017-12-08 23:30:03 +00:00
MipsCCState.cpp MachineFunction: Return reference from getFunction(); NFC 2017-12-15 22:22:58 +00:00
MipsCCState.h Reland "[SelectionDAG] Enable target specific vector scalarization of calls and returns" 2017-06-09 14:37:08 +00:00
MipsCallingConv.td Reland "[SelectionDAG] Enable target specific vector scalarization of calls and returns" 2017-06-09 14:37:08 +00:00
MipsCondMov.td [mips] Place certain 64 bit FPU instructions in their own decoder namespace 2017-10-05 10:27:37 +00:00
MipsConstantIslandPass.cpp MachineFunction: Return reference from getFunction(); NFC 2017-12-15 22:22:58 +00:00
MipsDSPInstrFormats.td
MipsDSPInstrInfo.td [mips] Provide additional DSP bitconvert patterns 2017-12-13 10:13:35 +00:00
MipsDelaySlotFiller.cpp [mips] Use the delay slot filler to convert branches for microMIPSR6. 2017-11-23 12:38:04 +00:00
MipsEVAInstrFormats.td
MipsEVAInstrInfo.td
MipsFastISel.cpp Remove alignment argument from memcpy/memmove/memset in favour of alignment attributes (Step 1) 2018-01-19 17:13:12 +00:00
MipsFrameLowering.cpp [mips] Use register scavenging with MSA. 2017-11-02 12:47:22 +00:00
MipsFrameLowering.h Move TargetFrameLowering.h to CodeGen where it's implemented 2017-11-03 22:32:11 +00:00
MipsHazardSchedule.cpp [Mips] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC). 2017-08-03 22:12:30 +00:00
MipsISelDAGToDAG.cpp
MipsISelDAGToDAG.h
MipsISelLowering.cpp [mips] Provide correct descriptions of asm constraints in the comments. NFC 2017-12-29 19:18:30 +00:00
MipsISelLowering.h Fix a bunch more layering of CodeGen headers that are in Target 2017-11-17 01:07:10 +00:00
MipsInstrFPU.td [mips] Fix (dis)assembly of abs.fmt for micromips 2017-10-26 11:36:54 +00:00
MipsInstrFormats.td
MipsInstrInfo.cpp Reland "[mips] Fix the target specific instruction verifier" 2017-12-18 15:56:40 +00:00
MipsInstrInfo.h Target/TargetInstrInfo.h -> CodeGen/TargetInstrInfo.h to match layering 2017-11-08 01:01:31 +00:00
MipsInstrInfo.td [mips] Removal of microMIPS64R6 2017-12-11 11:21:40 +00:00
MipsLongBranch.cpp [mips] Add partial support for R6 in the long branch pass 2017-12-14 14:55:25 +00:00
MipsMCInstLower.cpp [Mips] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC). 2017-08-03 22:12:30 +00:00
MipsMCInstLower.h [Mips] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC). 2017-08-03 22:12:30 +00:00
MipsMSAInstrFormats.td
MipsMSAInstrInfo.td [mips][msa] Mask vectors holding shift amounts 2017-04-20 13:26:46 +00:00
MipsMTInstrFormats.td Reland "[mips][mt][6/7] Add support for mftr, mttr instructions." 2017-11-14 22:26:42 +00:00
MipsMTInstrInfo.td Reland "[mips][mt][6/7] Add support for mftr, mttr instructions." 2017-11-14 22:26:42 +00:00
MipsMachineFunction.cpp [mips] Removal of microMIPS64R6 2017-12-11 11:21:40 +00:00
MipsMachineFunction.h
MipsModuleISelDAGToDAG.cpp [LegacyPassManager] Remove TargetMachine constructors 2017-05-18 17:21:13 +00:00
MipsOptimizePICCall.cpp Fix a bunch more layering of CodeGen headers that are in Target 2017-11-17 01:07:10 +00:00
MipsOptionRecord.h
MipsOs16.cpp Sort the remaining #include lines in include/... and lib/.... 2017-06-06 11:49:48 +00:00
MipsRegisterInfo.cpp MachineFunction: Return reference from getFunction(); NFC 2017-12-15 22:22:58 +00:00
MipsRegisterInfo.h [Mips] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC). 2017-08-03 22:12:30 +00:00
MipsRegisterInfo.td Trivial commit to force LLVM to run TableGen for Mips target after 2017-12-20 12:45:40 +00:00
MipsSEFrameLowering.cpp MachineFunction: Return reference from getFunction(); NFC 2017-12-15 22:22:58 +00:00
MipsSEFrameLowering.h [Mips] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC). 2017-08-03 22:12:30 +00:00
MipsSEISelDAGToDAG.cpp MachineFunction: Return reference from getFunction(); NFC 2017-12-15 22:22:58 +00:00
MipsSEISelDAGToDAG.h Reland "[mips] Fix multiprecision arithmetic." 2017-07-13 11:28:05 +00:00
MipsSEISelLowering.cpp Fix a bunch more layering of CodeGen headers that are in Target 2017-11-17 01:07:10 +00:00
MipsSEISelLowering.h [Mips] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC). 2017-08-03 22:12:30 +00:00
MipsSEInstrInfo.cpp MachineFunction: Return reference from getFunction(); NFC 2017-12-15 22:22:58 +00:00
MipsSEInstrInfo.h
MipsSERegisterInfo.cpp [mips] Remove duplicated R6 EVA instructions 2018-01-08 16:50:33 +00:00
MipsSERegisterInfo.h
MipsSchedule.td Reland "[mips][mt][6/7] Add support for mftr, mttr instructions." 2017-11-14 22:26:42 +00:00
MipsScheduleGeneric.td Reland "[mips][mt][6/7] Add support for mftr, mttr instructions." 2017-11-14 22:26:42 +00:00
MipsScheduleP5600.td [mips] Removal of microMIPS64R6 2017-12-11 11:21:40 +00:00
MipsSubtarget.cpp [mips] Removal of microMIPS64R6 2017-12-11 11:21:40 +00:00
MipsSubtarget.h [mips] Removal of microMIPS64R6 2017-12-11 11:21:40 +00:00
MipsTargetMachine.cpp (Re-landing) Expose a TargetMachine::getTargetTransformInfo function 2017-12-22 18:21:59 +00:00
MipsTargetMachine.h (Re-landing) Expose a TargetMachine::getTargetTransformInfo function 2017-12-22 18:21:59 +00:00
MipsTargetObjectFile.cpp [mips] Handle variables with an explicit section and interactions with .sdata, .sbss 2017-08-16 12:18:04 +00:00
MipsTargetObjectFile.h
MipsTargetStreamer.h Reland "[mips][mt][6/7] Add support for mftr, mttr instructions." 2017-11-14 22:26:42 +00:00
Relocation.txt [mips] Removal of microMIPS64R6 2017-12-11 11:21:40 +00:00