forked from OSchip/llvm-project
30 lines
1002 B
LLVM
30 lines
1002 B
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
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; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
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; RUN: FileCheck %s
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; These test cases aim to test the vector string isolate builtins on Power10.
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declare <16 x i8> @llvm.ppc.altivec.vclrlb(<16 x i8>, i32)
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declare <16 x i8> @llvm.ppc.altivec.vclrrb(<16 x i8>, i32)
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define <16 x i8> @test_vclrlb(<16 x i8> %a, i32 %n) {
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; CHECK-LABEL: test_vclrlb:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vclrlb v2, v2, r5
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; CHECK-NEXT: blr
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entry:
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%tmp = tail call <16 x i8> @llvm.ppc.altivec.vclrlb(<16 x i8> %a, i32 %n)
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ret <16 x i8> %tmp
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}
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define <16 x i8> @test_vclrrb(<16 x i8> %a, i32 %n) {
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; CHECK-LABEL: test_vclrrb:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vclrrb v2, v2, r5
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; CHECK-NEXT: blr
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entry:
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%tmp = tail call <16 x i8> @llvm.ppc.altivec.vclrrb(<16 x i8> %a, i32 %n)
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ret <16 x i8> %tmp
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}
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