forked from OSchip/llvm-project
121 lines
3.2 KiB
LLVM
121 lines
3.2 KiB
LLVM
; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr8 < %s | FileCheck %s
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr8 < %s | FileCheck %s
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; equivalent C code
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; struct s64 {
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; int a:5;
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; int b:16;
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; long c:42;
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; };
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; void bitfieldinsert64(struct s *p, unsigned short v) {
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; p->b = v;
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; }
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%struct.s64 = type { i64 }
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define void @bitfieldinsert64(%struct.s64* nocapture %p, i16 zeroext %v) {
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; CHECK-LABEL: @bitfieldinsert64
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; CHECK: ld [[REG1:[0-9]+]], 0(3)
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; CHECK-NEXT: rlwimi [[REG1]], 4, 5, 11, 26
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; CHECK-NEXT: std [[REG1]], 0(3)
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; CHECK-NEXT: blr
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entry:
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%0 = getelementptr inbounds %struct.s64, %struct.s64* %p, i64 0, i32 0
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%1 = zext i16 %v to i64
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%bf.load = load i64, i64* %0, align 8
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%bf.shl = shl nuw nsw i64 %1, 5
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%bf.clear = and i64 %bf.load, -2097121
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%bf.set = or i64 %bf.clear, %bf.shl
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store i64 %bf.set, i64* %0, align 8
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ret void
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}
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; bitfieldinsert32: Test for rlwimi
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; equivalent C code
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; struct s32 {
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; int a:8;
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; int b:16;
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; int c:8;
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; };
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; void bitfieldinsert32(struct s32 *p, unsigned int v) {
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; p->b = v;
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; }
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%struct.s32 = type { i32 }
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define void @bitfieldinsert32(%struct.s32* nocapture %p, i32 zeroext %v) {
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; CHECK-LABEL: @bitfieldinsert32
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; CHECK: lwz [[REG1:[0-9]+]], 0(3)
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; CHECK-NEXT: rlwimi [[REG1]], 4, 8, 8, 23
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; CHECK-NEXT: stw [[REG1]], 0(3)
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; CHECK-NEXT: blr
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entry:
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%0 = getelementptr inbounds %struct.s32, %struct.s32* %p, i64 0, i32 0
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%bf.load = load i32, i32* %0, align 4
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%bf.value = shl i32 %v, 8
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%bf.shl = and i32 %bf.value, 16776960
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%bf.clear = and i32 %bf.load, -16776961
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%bf.set = or i32 %bf.clear, %bf.shl
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store i32 %bf.set, i32* %0, align 4
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ret void
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}
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; test cases which include ISD::TRUNCATE
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; equivalent C code
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; struct s64b {
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; int a:4;
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; int b:16;
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; int c:24;
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; };
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; void bitfieldinsert64b(struct s64b *p, unsigned char v) {
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; p->b = v;
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; }
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%struct.s64b = type { i24, i24 }
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define void @bitfieldinsert64b(%struct.s64b* nocapture %p, i8 zeroext %v) {
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; CHECK-LABEL: @bitfieldinsert64b
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; CHECK: lwz [[REG1:[0-9]+]], 0(3)
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; CHECK-NEXT: rlwimi [[REG1]], 4, 4, 12, 27
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; CHECK-NEXT: stw [[REG1]], 0(3)
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; CHECK-NEXT: blr
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entry:
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%conv = zext i8 %v to i32
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%0 = bitcast %struct.s64b* %p to i32*
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%bf.load = load i32, i32* %0, align 4
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%bf.shl = shl nuw nsw i32 %conv, 4
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%bf.clear = and i32 %bf.load, -1048561
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%bf.set = or i32 %bf.clear, %bf.shl
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store i32 %bf.set, i32* %0, align 4
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ret void
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}
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; equivalent C code
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; struct s64c {
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; int a:5;
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; int b:16;
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; long c:10;
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; };
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; void bitfieldinsert64c(struct s64c *p, unsigned short v) {
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; p->b = v;
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; }
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%struct.s64c = type { i32, [4 x i8] }
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define void @bitfieldinsert64c(%struct.s64c* nocapture %p, i16 zeroext %v) {
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; CHECK-LABEL: @bitfieldinsert64c
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; CHECK: lwz [[REG1:[0-9]+]], 0(3)
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; CHECK-NEXT: rlwimi [[REG1]], 4, 5, 11, 26
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; CHECK-NEXT: stw [[REG1]], 0(3)
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; CHECK-NEXT: blr
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entry:
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%conv = zext i16 %v to i32
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%0 = getelementptr inbounds %struct.s64c, %struct.s64c* %p, i64 0, i32 0
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%bf.load = load i32, i32* %0, align 8
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%bf.shl = shl nuw nsw i32 %conv, 5
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%bf.clear = and i32 %bf.load, -2097121
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%bf.set = or i32 %bf.clear, %bf.shl
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store i32 %bf.set, i32* %0, align 8
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ret void
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}
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