.. |
AArch64
|
[AArch64][SVE] Asm: PTRUE and PTRUES instructions
|
2018-01-22 15:29:19 +00:00 |
AMDGPU
|
[AMDGPU][MC] Corrected parsing of image opcode modifiers r128 and d16
|
2018-01-29 14:20:42 +00:00 |
ARM
|
[DWARFv5] Number the line-table's directory array correctly.
|
2018-01-18 20:33:35 +00:00 |
AVR
|
[AVR] Implement some missing code paths
|
2017-12-11 11:01:27 +00:00 |
AsmParser
|
Add triples or specify REQUIRES: default_triple to some tests
|
2018-01-27 23:31:09 +00:00 |
BPF
|
bpf: print backward branch target properly
|
2017-11-16 19:15:36 +00:00 |
COFF
|
[CodeView] Add line numbers for inlined call sites
|
2018-01-18 22:55:43 +00:00 |
Disassembler
|
AMDGPU/SI: Add decoding in the GFX80_UNPACKED decoding namespace.
|
2018-01-30 16:42:40 +00:00 |
ELF
|
CodeGen: support an extension to pass linker options on ELF
|
2018-01-30 16:29:29 +00:00 |
Hexagon
|
[Hexagon] Add support for Hexagon V65
|
2017-12-11 18:57:54 +00:00 |
Lanai
|
[lanai] Add more tests for assembly of conditional ALU ops
|
2016-07-11 17:58:16 +00:00 |
MachO
|
[X86] Emit 11-byte or 15-byte NOPs on recent AMD targets, else default to 10-byte NOPs (PR22965)
|
2018-01-29 21:24:31 +00:00 |
Markup
|
…
|
|
Mips
|
[mips] Properly select abs and sqrt instructions
|
2018-01-23 10:09:39 +00:00 |
PowerPC
|
[PowerPC, AsmParser] Enable the mnemonic spell corrector
|
2017-12-16 02:42:18 +00:00 |
RISCV
|
[RISCV] Encode RISCV specific ELF e_flags to RISCV Binary by RISCVTargetStreamer
|
2018-01-26 07:53:07 +00:00 |
Sparc
|
[Sparc] invalid adjustments in TLS_LE/TLS_LDO relocations removed
|
2017-07-25 15:28:28 +00:00 |
SystemZ
|
[SystemZ, AsmParser] Enable the mnemonic spell corrector.
|
2017-07-18 09:17:00 +00:00 |
WebAssembly
|
[WebAssembly] MC: Use inline triple in test bitcode files
|
2018-01-23 23:03:47 +00:00 |
X86
|
[X86] Emit 11-byte or 15-byte NOPs on recent AMD targets, else default to 10-byte NOPs (PR22965)
|
2018-01-29 21:24:31 +00:00 |