llvm-project/llvm/test/Transforms/LoopStrengthReduce
Andrew Savonichev dc8a41de34 [ARM] Simplify address calculation for NEON load/store
The patch attempts to optimize a sequence of SIMD loads from the same
base pointer:

    %0 = gep float*, float* base, i32 4
    %1 = bitcast float* %0 to <4 x float>*
    %2 = load <4 x float>, <4 x float>* %1
    ...
    %n1 = gep float*, float* base, i32 N
    %n2 = bitcast float* %n1 to <4 x float>*
    %n3 = load <4 x float>, <4 x float>* %n2

For AArch64 the compiler generates a sequence of LDR Qt, [Xn, #16].
However, 32-bit NEON VLD1/VST1 lack the [Wn, #imm] addressing mode, so
the address is computed before every ld/st instruction:

    add r2, r0, #32
    add r0, r0, #16
    vld1.32 {d18, d19}, [r2]
    vld1.32 {d22, d23}, [r0]

This can be improved by computing address for the first load, and then
using a post-indexed form of VLD1/VST1 to load the rest:

    add r0, r0, #16
    vld1.32 {d18, d19}, [r0]!
    vld1.32 {d22, d23}, [r0]

In order to do that, the patch adds more patterns to DAGCombine:

  - (load (add ptr inc1)) and (add ptr inc2) are now folded if inc1
    and inc2 are constants.

  - (or ptr inc) is now recognized as a pointer increment if ptr is
    sufficiently aligned.

In addition to that, we now search for all possible base updates and
then pick the best one.

Differential Revision: https://reviews.llvm.org/D108988
2021-10-14 15:23:10 +03:00
..
AArch64 [AArch64] Make -mcpu=generic schedule for an in-order core 2021-10-09 15:58:31 +01:00
AMDGPU [LoopStrengthReduction] Fix pointer extend asserts 2021-07-30 17:24:08 -04:00
ARM [ARM] Simplify address calculation for NEON load/store 2021-10-14 15:23:10 +03:00
NVPTX
Power [PowerPC] implement target hook getTgtMemIntrinsic 2020-10-07 00:02:44 -04:00
X86 [SCEV] Stop blindly propagating flags from inbound geps to SCEV nodes 2021-10-01 16:30:44 -07:00
2005-08-15-AddRecIV.ll
2005-08-17-OutOfLoopVariant.ll
2005-09-12-UsesOutOutsideOfLoop.ll
2007-04-23-UseIterator.ll
2008-08-13-CmpStride.ll
2008-09-09-Overflow.ll
2009-01-13-nonconstant-stride-outside-loop.ll
2009-04-28-no-reduce-mul.ll
2011-07-19-CritEdgeBreakCrash.ll
2011-10-03-CritEdgeMerge.ll Reland [SCEV] Improve modelling for (null) pointer constants 2021-03-13 16:05:34 +03:00
2011-10-06-ReusePhi.ll
2011-10-13-SCEVChain.ll
2011-10-14-IntPtr.ll
2011-12-19-PostincQuadratic.ll
2012-01-02-nopreheader.ll
2012-01-16-nopreheader.ll
2012-03-15-nopreheader.ll
2012-03-26-constexpr.ll
2012-07-13-ExpandUDiv.ll
2012-07-18-LimitReassociate.ll
2013-01-05-IndBr.ll
2013-01-14-ReuseCast.ll
addrec-gep-address-space.ll
addrec-gep.ll
address-space-loop.ll
callbr-critical-edge-splitting.ll BreakCriticalEdges: do not split the critical edge from a CallBr indirect successor 2021-01-15 13:51:47 -08:00
callbr-critical-edge-splitting2.ll BreakCriticalEdges: do not split the critical edge from a CallBr indirect successor 2021-01-15 13:51:47 -08:00
count-to-zero.ll
dbg-preserve-0.ll [DebugInfo][LSR] Emit shorter expressions from scev-based salvaging 2021-09-19 21:41:44 +01:00
dbg-preserve-1.ll [DebugInfo] Avoid LSR crash on large integer inputs 2021-01-05 10:25:37 +00:00
dbg-preserve-2.ll [DebugInfo][LoopStrengthReduction] SCEV-based salvaging for LSR 2021-07-28 23:04:59 +01:00
dead-phi.ll
debuginfo-scev-salvage-0.ll [DebugInfo][LoopStrengthReduction] SCEV-based salvaging for LSR 2021-07-28 23:04:59 +01:00
debuginfo-scev-salvage-1.ll [DebugInfo][LoopStrengthReduction] SCEV-based salvaging for LSR 2021-07-28 23:04:59 +01:00
debuginfo-scev-salvage-2.ll [DebugInfo][LoopStrengthReduction] SCEV-based salvaging for LSR 2021-07-28 23:04:59 +01:00
debuginfo-scev-salvage-3.ll [DebugInfo][LoopStrengthReduction] SCEV-based salvaging for LSR 2021-07-28 23:04:59 +01:00
debuginfo-scev-salvage-4.ll [DebugInfo][LoopStrengthReduction] SCEV-based salvaging for LSR 2021-07-28 23:04:59 +01:00
different-type-ivs.ll
dominate-assert.ll
dont-hoist-simple-loop-constants.ll
dont_insert_redundant_ops.ll
dont_reduce_bytes.ll
dont_reverse.ll
ephemeral.ll
exit_compare_live_range.ll
funclet.ll Revert "Recommit "[SCEV] Look through single value PHIs." (take 2)" 2021-09-30 20:53:51 +01:00
gnarly-setupcost.ll
hoist-parent-preheader.ll
illegal-addr-modes.ll
invariant_value_first.ll
invariant_value_first_arg.ll
ivchain.ll [NewPM][LSR] Rename strength-reduce -> loop-reduce 2020-07-02 11:15:29 -07:00
lsr-comp-time.ll
lsr-overflow.ll
missing-phi-operand-update.ll
multi-edge-latch.ll [LSR] Add test for multi-edge latch (NFC) 2021-02-06 18:31:45 +01:00
negative-scale.ll
nested-reduce.ll
nonintegral.ll
nonlinear-postinc.ll
opaque-ptr.ll [OpaquePtr] Forbid mixing typed and opaque pointers 2021-09-10 15:18:23 +02:00
ops_after_indvar.ll
optimizemax_debugloc.ll [LSR][DebugInfo] Don't unnecessarily drop DebugLocs 2021-04-26 13:14:42 +01:00
phi_node_update_multiple_preds.ll
post-inc-icmpzero.ll Revert "Return "[SCEV] Use isBasicBlockEntryGuardedByCond in isLoopBackedgeGuardedByCond", 2nd try" 2020-11-26 18:12:51 +07:00
post-inc-optsize.ll
post-increment-insertion.ll [LSR] Unify scheduling of existing and inserted addrecs 2021-03-03 12:07:55 -08:00
pr2537.ll
pr2570.ll
pr3086.ll [test] Fix tests using -analyze that fail under NPM 2020-10-21 21:54:30 -07:00
pr3399.ll
pr3571.ll
pr12018.ll
pr12048.ll
pr12691.ll
pr18165.ll Revert "[NFC] remove explicit default value for strboolattr attribute in tests" 2021-05-24 19:43:40 +02:00
pr25541.ll
pr27056.ll Recommit [ScalarEvolution] Make getMinusSCEV() fail for unrelated pointers. 2021-07-06 12:16:05 -07:00
pr31627.ll
pr48725.ll [SCEV] Do not cache comparison result upon reached max depth as "equivalence". PR48725 2021-01-29 12:08:34 +07:00
pr50765.ll [LSR] Filter out zero factors. PR50765 2021-06-23 10:43:06 +07:00
pr50918.ll [LSR] Handle case 1*reg => reg. PR50918 2021-07-16 11:33:59 +07:00
pr51329.ll {DebugInfo][LSR] Don't cache dbg.value that are already undef 2021-08-05 19:16:43 +01:00
pr51656.ll [DebugInfo][LSR] Limit the size of SCEV translated to DIExpression 2021-10-07 15:38:28 +00:00
preserve-gep-loop-variant.ll
related_indvars.ll
remove_indvar.ll
scaling-factor-incompat-type.ll [LSR] Make sure that Factor fits into Base type 2021-09-21 20:50:50 +03:00
scaling_factor_cost_crash.ll
scev-after-loopinstsimplify.ll
scev-expander-lcssa.ll [SCEV] Add additional tests. 2020-07-28 16:15:57 +01:00
scev-insertpt-bug.ll
sext-ind-var.ll
share_code_in_preheader.ll
share_ivs.ll
shl.ll
two-combinations-bug.ll Revert "[NFC] remove explicit default value for strboolattr attribute in tests" 2021-05-24 19:43:40 +02:00
uglygep-address-space.ll
uglygep.ll
use_postinc_value_outside_loop.ll
var_stride_used_by_compare.ll
variable_stride.ll
wrong-hoisting-iv.ll [SCEVExpander] Stop hoisting IR when reusing phis 2021-08-17 09:38:32 -07:00