llvm-project/llvm/test/MC/Hexagon
Brian Cain 743e263e08 [hexagon] Add system register, transfer support
This commit adds the system reg/regpair definitions and the corresponding
register transfer instructions.
2021-10-14 06:37:04 -07:00
..
PacketRules [Hexagon] Move testcase from c1873631d0 to proper location 2020-01-17 12:34:50 -06:00
extensions [Hexagon][test] Migrate llvm-objdump --mv6[0567]t?/--mhvx to --mcpu=hexagonv*/--mattr=+hvx 2021-05-04 11:00:01 -07:00
instructions
J2_trap1_dep.s [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
align.s [Hexagon][test] Migrate llvm-objdump --mv6[0567]t?/--mhvx to --mcpu=hexagonv*/--mattr=+hvx 2021-05-04 11:00:01 -07:00
asmMap.s
audio.s [Hexagon] Add support for Hexagon v67t microarchitecture (tiny core) 2020-01-21 11:35:10 -06:00
basic.ll [llvm-readobj] Update tests because of changes in llvm-readobj behavior 2020-07-20 10:39:04 +01:00
bug20416.s
c4_newval.s [Hexagon] pX.new cannot be used with p3:0 as producer 2020-05-19 17:06:34 -05:00
capitalizedEndloop.s
cmpyrw.s [Hexagon][test] Migrate llvm-objdump --mv6[0567]t?/--mhvx to --mcpu=hexagonv*/--mattr=+hvx 2021-05-04 11:00:01 -07:00
common-redeclare.s [llvm-objdump] --syms: make flags closer to GNU objdump 2020-03-05 09:59:53 -08:00
data-directives-invalid.s [MC] Remove unneeded "in '.xxx' directive" from diagnostics 2021-05-04 13:30:29 -07:00
data-directives-valid.s
dcfetch-symbol.s
dcfetch.s
dealloc-return-jump.s
decode_acc_type.s
dis-duplex-p0.s
double-vector-producer.s
duplex-addi-global-imm.s
duplex-registers.s
elf-flags.s [llvm-readobj] Update tests because of changes in llvm-readobj behavior 2020-07-20 10:39:04 +01:00
empty_asm.s
equ.s
ext-callt-rel.s
extended_relocations.ll Revert "[NFC] remove explicit default value for strboolattr attribute in tests" 2021-05-24 19:43:40 +02:00
extender.s
fixups.s
got.s
gprel-shflag.s
guest.s
hex-immediates.s
hvx-double-implies-hvx.s [Hexagon][test] Migrate llvm-objdump --mv6[0567]t?/--mhvx to --mcpu=hexagonv*/--mattr=+hvx 2021-05-04 11:00:01 -07:00
hvx-swapped-regpairs-alias-neg.s [Hexagon] v67+ HVX register pairs should support either direction 2020-02-14 12:43:43 -06:00
hvx-swapped-regpairs.s [Hexagon][test] Migrate llvm-objdump --mv6[0567]t?/--mhvx to --mcpu=hexagonv*/--mattr=+hvx 2021-05-04 11:00:01 -07:00
iconst.s
inst_add.ll
inst_add64.ll
inst_and.ll
inst_and64.ll
inst_aslh.ll
inst_asrh.ll
inst_cmp_eq.ll [Hexagon] Improve lowering of returns of i1 2021-04-22 16:47:52 -05:00
inst_cmp_eqi.ll [Hexagon] Improve lowering of returns of i1 2021-04-22 16:47:52 -05:00
inst_cmp_gt.ll [Hexagon] Improve lowering of returns of i1 2021-04-22 16:47:52 -05:00
inst_cmp_gti.ll [Hexagon] Improve lowering of returns of i1 2021-04-22 16:47:52 -05:00
inst_cmp_lt.ll [Hexagon] Improve lowering of returns of i1 2021-04-22 16:47:52 -05:00
inst_cmp_ugt.ll [Hexagon] Improve lowering of returns of i1 2021-04-22 16:47:52 -05:00
inst_cmp_ugti.ll [Hexagon] Improve lowering of returns of i1 2021-04-22 16:47:52 -05:00
inst_cmp_ult.ll [Hexagon] Improve lowering of returns of i1 2021-04-22 16:47:52 -05:00
inst_or.ll
inst_or64.ll
inst_select.ll
inst_sub.ll
inst_sub64.ll
inst_sxtb.ll
inst_sxth.ll
inst_xor.ll
inst_xor64.ll
inst_zxtb.ll
inst_zxth.ll
inval_immed.s
jumpdoublepound.s
labels.s
lcomm.s ELFObjectWriter: Don't sort local symbols 2021-02-07 15:47:10 -08:00
lit.local.cfg
load-GPRel.s
missing_label.s [llvm-objdump] -d: print `00000000 <foo>:` instead of `00000000 foo:` 2020-03-05 18:05:28 -08:00
multiple-pc4.s [Hexagon] pX.new cannot be used with p3:0 as producer 2020-05-19 17:06:34 -05:00
multiple_errs.s
new-value-check.s
non-relocatable.s
not-over.s
not_found.s [test] Use host platform specific error message substitution in lit tests 2021-01-29 07:16:30 -05:00
nowarn.s
offset.s [llvm-objdump] --syms: make flags closer to GNU objdump 2020-03-05 09:59:53 -08:00
operand-range.s
out_of_range.s
packetrelo.s
parse-pound-hi.s
pcrel.s
plt-rel.s
quad_regs.s [Hexagon][test] Migrate llvm-objdump --mv6[0567]t?/--mhvx to --mcpu=hexagonv*/--mattr=+hvx 2021-05-04 11:00:01 -07:00
reg_altnames.s
register-alt-names.s
registers_readonly.s
relaxed_newvalue.s
relocations.s
ro-c9.s
ro-cc9.s
smallcore_dis.s [Hexagon][test] Migrate llvm-objdump --mv6[0567]t?/--mhvx to --mcpu=hexagonv*/--mattr=+hvx 2021-05-04 11:00:01 -07:00
solo-axok.s
store-GPRel.s
sysregs.s [hexagon] Add system register, transfer support 2021-10-14 06:37:04 -07:00
sysregs2.s [hexagon] Add system register, transfer support 2021-10-14 06:37:04 -07:00
sysregs3.s [hexagon] Add system register, transfer support 2021-10-14 06:37:04 -07:00
test.s
tied-ops.s
tprel_noextend.s
two-extenders.s
two_ext.s
v60-alu.s [Hexagon][test] Migrate llvm-objdump --mv6[0567]t?/--mhvx to --mcpu=hexagonv*/--mattr=+hvx 2021-05-04 11:00:01 -07:00
v60-misc.s [Hexagon][test] Migrate llvm-objdump --mv6[0567]t?/--mhvx to --mcpu=hexagonv*/--mattr=+hvx 2021-05-04 11:00:01 -07:00
v60-permute.s [Hexagon][test] Migrate llvm-objdump --mv6[0567]t?/--mhvx to --mcpu=hexagonv*/--mattr=+hvx 2021-05-04 11:00:01 -07:00
v60-shift.s [Hexagon][test] Migrate llvm-objdump --mv6[0567]t?/--mhvx to --mcpu=hexagonv*/--mattr=+hvx 2021-05-04 11:00:01 -07:00
v60-vcmp.s [Hexagon][test] Migrate llvm-objdump --mv6[0567]t?/--mhvx to --mcpu=hexagonv*/--mattr=+hvx 2021-05-04 11:00:01 -07:00
v60-vmem.s [Hexagon][test] Migrate llvm-objdump --mv6[0567]t?/--mhvx to --mcpu=hexagonv*/--mattr=+hvx 2021-05-04 11:00:01 -07:00
v60-vmpy-acc.s [Hexagon][test] Migrate llvm-objdump --mv6[0567]t?/--mhvx to --mcpu=hexagonv*/--mattr=+hvx 2021-05-04 11:00:01 -07:00
v60-vmpy1.s [Hexagon][test] Migrate llvm-objdump --mv6[0567]t?/--mhvx to --mcpu=hexagonv*/--mattr=+hvx 2021-05-04 11:00:01 -07:00
v60lookup.s [Hexagon][test] Migrate llvm-objdump --mv6[0567]t?/--mhvx to --mcpu=hexagonv*/--mattr=+hvx 2021-05-04 11:00:01 -07:00
v62_all.s [Hexagon][test] Migrate llvm-objdump --mv6[0567]t?/--mhvx to --mcpu=hexagonv*/--mattr=+hvx 2021-05-04 11:00:01 -07:00
v62_jumps.s [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
v62a.s [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options 2020-03-15 17:46:23 -07:00
v62a_regs.s
v65_all.s [Hexagon][test] Migrate llvm-objdump --mv6[0567]t?/--mhvx to --mcpu=hexagonv*/--mattr=+hvx 2021-05-04 11:00:01 -07:00
v66.s [Hexagon][test] Migrate llvm-objdump --mv6[0567]t?/--mhvx to --mcpu=hexagonv*/--mattr=+hvx 2021-05-04 11:00:01 -07:00
v67.s [Hexagon][test] Migrate llvm-objdump --mv6[0567]t?/--mhvx to --mcpu=hexagonv*/--mattr=+hvx 2021-05-04 11:00:01 -07:00
v67_all.s [Hexagon][test] Migrate llvm-objdump --mv6[0567]t?/--mhvx to --mcpu=hexagonv*/--mattr=+hvx 2021-05-04 11:00:01 -07:00
v67t_align.s [Hexagon] Add support for Hexagon v67t microarchitecture (tiny core) 2020-01-21 11:35:10 -06:00
v67t_arch.s [Hexagon] Add support for Hexagon v67t microarchitecture (tiny core) 2020-01-21 11:35:10 -06:00
v67t_option.s [Hexagon] Add support for Hexagon v67t microarchitecture (tiny core) 2020-01-21 11:35:10 -06:00
vgather-new.s
vpred_defs.s
vscatter-slot.s
vtmp_def.s
z-instructions.s [Hexagon][test] Migrate llvm-objdump --mv6[0567]t?/--mhvx to --mcpu=hexagonv*/--mattr=+hvx 2021-05-04 11:00:01 -07:00