forked from OSchip/llvm-project
48 lines
1.6 KiB
LLVM
48 lines
1.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE42
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1
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; If we have SSE/AVX intrinsics in the code, we miss obvious combines
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; unless we do them late on X86-specific nodes.
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declare <4 x i32> @llvm.x86.sse41.pmaxsd(<4 x i32>, <4 x i32>)
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define <4 x i32> @PR27924_cmpeq(<4 x i32> %a, <4 x i32> %b) {
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; SSE-LABEL: PR27924_cmpeq:
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; SSE: # BB#0:
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; SSE-NEXT: pcmpeqd %xmm0, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: PR27924_cmpeq:
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; AVX: # BB#0:
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; AVX-NEXT: vpcmpeqd %xmm0, %xmm0, %xmm0
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; AVX-NEXT: retq
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;
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%cmp = icmp sgt <4 x i32> %a, %b
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%max = select <4 x i1> %cmp, <4 x i32> %a, <4 x i32> %b
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%sse_max = tail call <4 x i32> @llvm.x86.sse41.pmaxsd(<4 x i32> %a, <4 x i32> %b)
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%truth = icmp eq <4 x i32> %max, %sse_max
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%ret = sext <4 x i1> %truth to <4 x i32>
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ret <4 x i32> %ret
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}
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define <4 x i32> @PR27924_cmpgt(<4 x i32> %a, <4 x i32> %b) {
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; SSE-LABEL: PR27924_cmpgt:
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; SSE: # BB#0:
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; SSE-NEXT: xorps %xmm0, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: PR27924_cmpgt:
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; AVX: # BB#0:
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; AVX-NEXT: vxorps %xmm0, %xmm0, %xmm0
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; AVX-NEXT: retq
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;
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%cmp = icmp sgt <4 x i32> %a, %b
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%max = select <4 x i1> %cmp, <4 x i32> %a, <4 x i32> %b
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%sse_max = tail call <4 x i32> @llvm.x86.sse41.pmaxsd(<4 x i32> %a, <4 x i32> %b)
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%untruth = icmp sgt <4 x i32> %max, %sse_max
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%ret = sext <4 x i1> %untruth to <4 x i32>
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ret <4 x i32> %ret
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}
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