forked from OSchip/llvm-project
79 lines
2.3 KiB
LLVM
79 lines
2.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; Check that 64-bit division is bypassed correctly.
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; RUN: llc < %s -mattr=+idivq-to-divl -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
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; Additional tests for 64-bit divide bypass
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define i64 @Test_get_quotient(i64 %a, i64 %b) nounwind {
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; CHECK-LABEL: Test_get_quotient:
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; CHECK: # BB#0:
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; CHECK-NEXT: movq %rdi, %rax
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; CHECK-NEXT: orq %rsi, %rax
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; CHECK-NEXT: shrq $32, %rax
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; CHECK-NEXT: je .LBB0_1
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; CHECK-NEXT: # BB#2:
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; CHECK-NEXT: movq %rdi, %rax
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; CHECK-NEXT: cqto
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; CHECK-NEXT: idivq %rsi
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; CHECK-NEXT: retq
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; CHECK-NEXT: .LBB0_1:
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; CHECK-NEXT: xorl %edx, %edx
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; CHECK-NEXT: movl %edi, %eax
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; CHECK-NEXT: divl %esi
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; CHECK-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<def>
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; CHECK-NEXT: retq
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%result = sdiv i64 %a, %b
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ret i64 %result
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}
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define i64 @Test_get_remainder(i64 %a, i64 %b) nounwind {
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; CHECK-LABEL: Test_get_remainder:
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; CHECK: # BB#0:
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; CHECK-NEXT: movq %rdi, %rax
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; CHECK-NEXT: orq %rsi, %rax
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; CHECK-NEXT: shrq $32, %rax
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; CHECK-NEXT: je .LBB1_1
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; CHECK-NEXT: # BB#2:
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; CHECK-NEXT: movq %rdi, %rax
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; CHECK-NEXT: cqto
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; CHECK-NEXT: idivq %rsi
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; CHECK-NEXT: movq %rdx, %rax
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; CHECK-NEXT: retq
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; CHECK-NEXT: .LBB1_1:
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; CHECK-NEXT: xorl %edx, %edx
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; CHECK-NEXT: movl %edi, %eax
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; CHECK-NEXT: divl %esi
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; CHECK-NEXT: # kill: %EDX<def> %EDX<kill> %RDX<def>
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; CHECK-NEXT: movq %rdx, %rax
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; CHECK-NEXT: retq
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%result = srem i64 %a, %b
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ret i64 %result
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}
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define i64 @Test_get_quotient_and_remainder(i64 %a, i64 %b) nounwind {
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; CHECK-LABEL: Test_get_quotient_and_remainder:
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; CHECK: # BB#0:
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; CHECK-NEXT: movq %rdi, %rax
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; CHECK-NEXT: orq %rsi, %rax
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; CHECK-NEXT: shrq $32, %rax
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; CHECK-NEXT: je .LBB2_1
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; CHECK-NEXT: # BB#2:
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; CHECK-NEXT: movq %rdi, %rax
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; CHECK-NEXT: cqto
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; CHECK-NEXT: idivq %rsi
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; CHECK-NEXT: addq %rdx, %rax
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; CHECK-NEXT: retq
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; CHECK-NEXT: .LBB2_1:
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; CHECK-NEXT: xorl %edx, %edx
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; CHECK-NEXT: movl %edi, %eax
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; CHECK-NEXT: divl %esi
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; CHECK-NEXT: # kill: %EDX<def> %EDX<kill> %RDX<def>
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; CHECK-NEXT: # kill: %EAX<def> %EAX<kill> %RAX<def>
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; CHECK-NEXT: addq %rdx, %rax
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; CHECK-NEXT: retq
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%resultdiv = sdiv i64 %a, %b
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%resultrem = srem i64 %a, %b
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%result = add i64 %resultdiv, %resultrem
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ret i64 %result
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}
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