.. |
intrinsics
|
[Hexagon] Add support for __builtin_prefetch
|
2016-02-18 13:58:38 +00:00 |
vect
|
[Hexagon] Split double registers
|
2015-10-16 20:38:54 +00:00 |
Atomics.ll
|
[Hexagon] Add support for atomic RMW operations
|
2015-07-09 14:51:21 +00:00 |
BranchPredict.ll
|
[Hexagon] Some cleanup of instruction selection code
|
2015-04-22 21:17:00 +00:00 |
NVJumpCmp.ll
|
[Hexagon] Add NewValueJump support for C4_cmpneq, C4_cmplte, C4_cmplteu
|
2015-12-08 16:28:32 +00:00 |
absaddr-store.ll
|
[Hexagon] Enabling ASM parsing on Hexagon backend and adding instruction parsing tests. General updating of the code emission.
|
2015-11-09 04:07:48 +00:00 |
absimm.ll
|
[Hexagon] Fixing store instructions and reenabling a few more tests.
|
2015-11-10 00:22:00 +00:00 |
adde.ll
|
[Hexagon] Preprocess mapped instructions before lowering to MC
|
2015-12-15 17:05:45 +00:00 |
addh-sext-trunc.ll
|
[Hexagon] Adding some codegen tests and updating some to match spec.
|
2015-06-13 21:46:39 +00:00 |
addh-shifted.ll
|
[Hexagon] Adding some codegen tests and updating some to match spec.
|
2015-06-13 21:46:39 +00:00 |
addh.ll
|
[Hexagon] Adding some codegen tests and updating some to match spec.
|
2015-06-13 21:46:39 +00:00 |
addrmode-indoff.ll
|
[Hexagon] Adding some codegen tests and updating some to match spec.
|
2015-06-13 21:46:39 +00:00 |
alu64.ll
|
[Hexagon] Preprocess mapped instructions before lowering to MC
|
2015-12-15 17:05:45 +00:00 |
always-ext.ll
|
[Hexagon] Fixing load instruction parsing and reenabling tests.
|
2015-11-10 00:02:27 +00:00 |
args.ll
|
[Hexagon] Adding some codegen tests and updating some to match spec.
|
2015-06-13 21:46:39 +00:00 |
ashift-left-right.ll
|
[Hexagon] Adding some codegen tests and updating some to match spec.
|
2015-06-13 21:46:39 +00:00 |
avoid-predspill-calleesaved.ll
|
[Hexagon] Optimize stack slot spills
|
2016-02-12 22:53:35 +00:00 |
avoid-predspill.ll
|
[Hexagon] Optimize stack slot spills
|
2016-02-12 22:53:35 +00:00 |
barrier-flag.ll
|
[Hexagon] Adding some codegen tests and updating some to match spec.
|
2015-06-13 21:46:39 +00:00 |
base-offset-addr.ll
|
[Hexagon] Adding some codegen tests and updating some to match spec.
|
2015-06-13 21:46:39 +00:00 |
base-offset-post.ll
|
[Hexagon] Adding some codegen tests and updating some to match spec.
|
2015-06-13 21:46:39 +00:00 |
bit-eval.ll
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[Hexagon] Preprocess mapped instructions before lowering to MC
|
2015-12-15 17:05:45 +00:00 |
bit-extractu-half.ll
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[Hexagon] Use S2_lsr_i_r instead of S2_extractu to obtain upper halfword
|
2016-01-14 21:59:22 +00:00 |
bit-loop.ll
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[Hexagon] Bit-based instruction simplification
|
2015-10-20 22:57:13 +00:00 |
bit-phi.ll
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[Hexagon] Do not insert non-phis before phis in bit simplification
|
2016-01-13 15:48:18 +00:00 |
block-addr.ll
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[Hexagon] Use A2_tfrsi for constant pool and jump table addresses
|
2015-04-22 18:25:53 +00:00 |
branch-non-mbb.ll
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[Hexagon] Handle branches with non-mbb operands
|
2016-01-14 15:05:27 +00:00 |
brev_ld.ll
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[Hexagon] Eliminate pseudo instructions for circ/brev loads and stores
|
2016-02-12 17:01:51 +00:00 |
brev_st.ll
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[Hexagon] Eliminate pseudo instructions for circ/brev loads and stores
|
2016-02-12 17:01:51 +00:00 |
bugAsmHWloop.ll
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[Hexagon] Printing packet brackets when asm printing and adding a number of tests that test packet brackets.
|
2015-06-18 20:43:50 +00:00 |
builtin-prefetch-offset.ll
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[Hexagon] Add support for __builtin_prefetch
|
2016-02-18 13:58:38 +00:00 |
builtin-prefetch.ll
|
[Hexagon] Add support for __builtin_prefetch
|
2016-02-18 13:58:38 +00:00 |
calling-conv-2.ll
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[PATCH] [HEXAGON] Add a test program to verify calling convention
|
2015-05-12 20:13:10 +00:00 |
cext-check.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
cext-valid-packet1.ll
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[Hexagon] Printing packet brackets when asm printing and adding a number of tests that test packet brackets.
|
2015-06-18 20:43:50 +00:00 |
cext-valid-packet2.ll
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[Hexagon] Printing packet brackets when asm printing and adding a number of tests that test packet brackets.
|
2015-06-18 20:43:50 +00:00 |
cext.ll
|
[Hexagon] Adding a number of other tests for min/max instructions and loading i1s.
|
2015-06-17 20:29:33 +00:00 |
cexti16.ll
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[Hexagon] Adding a number of other tests for min/max instructions and loading i1s.
|
2015-06-17 20:29:33 +00:00 |
cfi-late.ll
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DI: Reverse direction of subprogram -> function edge.
|
2015-11-05 22:03:56 +00:00 |
checktabs.ll
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[Hexagon] Printing packet brackets when asm printing and adding a number of tests that test packet brackets.
|
2015-06-18 20:43:50 +00:00 |
circ_ld.ll
|
[Hexagon] Eliminate pseudo instructions for circ/brev loads and stores
|
2016-02-12 17:01:51 +00:00 |
circ_ldd_bug.ll
|
[Hexagon] Intrinsics for circular and bit-reversed loads and stores
|
2015-03-18 16:23:44 +00:00 |
circ_ldw.ll
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[Hexagon] Intrinsics for circular and bit-reversed loads and stores
|
2015-03-18 16:23:44 +00:00 |
circ_st.ll
|
[Hexagon] Eliminate pseudo instructions for circ/brev loads and stores
|
2016-02-12 17:01:51 +00:00 |
clr_set_toggle.ll
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[Hexagon] Bit-based instruction simplification
|
2015-10-20 22:57:13 +00:00 |
cmp-extend.ll
|
[Hexagon] Adding some compare tests, fixing existing XFAILed tests, and removing mcpu=hexagonv4 since that's the minimum version anyway.
|
2015-06-17 17:19:05 +00:00 |
cmp-promote.ll
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[Hexagon] Adding some compare tests, fixing existing XFAILed tests, and removing mcpu=hexagonv4 since that's the minimum version anyway.
|
2015-06-17 17:19:05 +00:00 |
cmp-to-genreg.ll
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[Hexagon] Adding some compare tests, fixing existing XFAILed tests, and removing mcpu=hexagonv4 since that's the minimum version anyway.
|
2015-06-17 17:19:05 +00:00 |
cmp-to-predreg.ll
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[Hexagon] Adding some compare tests, fixing existing XFAILed tests, and removing mcpu=hexagonv4 since that's the minimum version anyway.
|
2015-06-17 17:19:05 +00:00 |
cmp.ll
|
[Hexagon] Adding some compare tests, fixing existing XFAILed tests, and removing mcpu=hexagonv4 since that's the minimum version anyway.
|
2015-06-17 17:19:05 +00:00 |
cmp_pred.ll
|
[Hexagon] Adding some compare tests, fixing existing XFAILed tests, and removing mcpu=hexagonv4 since that's the minimum version anyway.
|
2015-06-17 17:19:05 +00:00 |
cmp_pred2.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
cmp_pred_reg.ll
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[Hexagon] Adding some compare tests, fixing existing XFAILed tests, and removing mcpu=hexagonv4 since that's the minimum version anyway.
|
2015-06-17 17:19:05 +00:00 |
cmpb-eq.ll
|
[Hexagon] Adding some compare tests, fixing existing XFAILed tests, and removing mcpu=hexagonv4 since that's the minimum version anyway.
|
2015-06-17 17:19:05 +00:00 |
cmpb_pred.ll
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[Hexagon] Adding some compare tests, fixing existing XFAILed tests, and removing mcpu=hexagonv4 since that's the minimum version anyway.
|
2015-06-17 17:19:05 +00:00 |
combine.ll
|
[Hexagon] Split double registers
|
2015-10-16 20:38:54 +00:00 |
combine_ir.ll
|
[Hexagon] Split double registers
|
2015-10-16 20:38:54 +00:00 |
common-gep-basic.ll
|
[Hexagon] Implement commoning of GetElementPtr instructions
|
2015-07-08 19:22:28 +00:00 |
common-gep-icm.ll
|
[Hexagon] Implement commoning of GetElementPtr instructions
|
2015-07-08 19:22:28 +00:00 |
compound.ll
|
[Hexagon] Fixing compound register printing and reenabling more tests.
|
2015-11-10 00:51:56 +00:00 |
const64.ll
|
[Hexagon] Generate CONST64 when optimizing for size in copy-to-combine
|
2016-01-15 14:08:31 +00:00 |
convertdptoint.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
convertdptoll.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
convertsptoint.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
convertsptoll.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
ctlz-cttz-ctpop.ll
|
[Hexagon] Some cleanup of instruction selection code
|
2015-04-22 21:17:00 +00:00 |
ctor.ll
|
Handle ctor/init_array initialization.
|
2014-11-03 14:56:05 +00:00 |
dadd.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
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2015-02-27 21:17:42 +00:00 |
dmul.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
double.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
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2015-02-27 21:17:42 +00:00 |
doubleconvert-ieee-rnd-near.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
dsub.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
dualstore.ll
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[Hexagon] Reapply r239097 with tests corrected for shuffling and duplexing.
|
2015-06-05 16:00:11 +00:00 |
duplex.ll
|
[Hexagon] Reapply r239097 with tests corrected for shuffling and duplexing.
|
2015-06-05 16:00:11 +00:00 |
early-if-conversion-bug1.ll
|
[Hexagon] Add an early if-conversion pass
|
2015-10-06 15:49:14 +00:00 |
early-if-phi-i1.ll
|
[Hexagon] Add an early if-conversion pass
|
2015-10-06 15:49:14 +00:00 |
early-if-spare.ll
|
[Hexagon] Add an early if-conversion pass
|
2015-10-06 15:49:14 +00:00 |
early-if.ll
|
[Hexagon] Add an early if-conversion pass
|
2015-10-06 15:49:14 +00:00 |
eh_return.ll
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[Hexagon] Printing packet brackets when asm printing and adding a number of tests that test packet brackets.
|
2015-06-18 20:43:50 +00:00 |
eliminate-pred-spill.ll
|
[Hexagon] Optimize stack slot spills
|
2016-02-12 22:53:35 +00:00 |
expand-condsets-basic.ll
|
Expand MUX instructions early on Hexagon
|
2015-03-31 13:35:12 +00:00 |
expand-condsets-rm-segment.ll
|
Expand MUX instructions early on Hexagon
|
2015-03-31 13:35:12 +00:00 |
expand-condsets-undef.ll
|
Expand MUX instructions early on Hexagon
|
2015-03-31 13:35:12 +00:00 |
extload-combine.ll
|
[Hexagon] Split double registers
|
2015-10-16 20:38:54 +00:00 |
extract-basic.ll
|
[Hexagon] Generate "extract" instructions more aggressively
|
2015-07-14 17:07:24 +00:00 |
fadd.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
fcmp.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
float.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
floatconvert-ieee-rnd-near.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
fmul.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
frame.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
fsub.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
fusedandshift.ll
|
[Hexagon] Generate "extract" instructions more aggressively
|
2015-07-14 17:07:24 +00:00 |
gp-plus-offset-load.ll
|
[Hexagon] Missed testcase update in r260895
|
2016-02-15 16:15:02 +00:00 |
gp-plus-offset-store.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to gep operator
|
2015-03-13 18:20:45 +00:00 |
gp-rel.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
hwloop-cleanup.ll
|
[Hexagon] Handle ENDLOOP0 in InsertBranch and RemoveBranch
|
2015-03-18 15:56:43 +00:00 |
hwloop-const.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to getelementptr instruction
|
2015-02-27 19:29:02 +00:00 |
hwloop-crit-edge.ll
|
[Hexagon] Generate hardware loop when loop has a critical edge
|
2015-05-13 14:54:24 +00:00 |
hwloop-dbg.ll
|
DI: Reverse direction of subprogram -> function edge.
|
2015-11-05 22:03:56 +00:00 |
hwloop-le.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
hwloop-loop1.ll
|
[Hexagon] Generate loop1 instruction for nested loops
|
2015-05-13 17:56:03 +00:00 |
hwloop-lt.ll
|
[Hexagon] Adding a number of other tests for min/max instructions and loading i1s.
|
2015-06-17 20:29:33 +00:00 |
hwloop-lt1.ll
|
[Hexagon] Adding a number of other tests for min/max instructions and loading i1s.
|
2015-06-17 20:29:33 +00:00 |
hwloop-missed.ll
|
[Hexagon] Generate more hardware loops
|
2015-05-08 20:18:21 +00:00 |
hwloop-ne.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
hwloop-ph-deadcode.ll
|
[Hexagon] Remove dead constant assignment in hardware loop pass
|
2015-05-14 17:31:40 +00:00 |
hwloop-pos-ivbump1.ll
|
[Hexagon] Check for underflow/wrap in hardware loop pass
|
2015-05-14 14:15:08 +00:00 |
hwloop-preheader.ll
|
[Hexagon] Generate more hardware loops
|
2015-05-08 20:18:21 +00:00 |
hwloop-range.ll
|
[Hexagon] Use constant extenders to fix up hardware loops
|
2015-04-27 14:16:43 +00:00 |
hwloop-recursion.ll
|
[Hexagon] Check for underflow/wrap in hardware loop pass
|
2015-05-14 14:15:08 +00:00 |
hwloop-wrap.ll
|
[Hexagon] Check for underflow/wrap in hardware loop pass
|
2015-05-14 14:15:08 +00:00 |
hwloop-wrap2.ll
|
[Hexagon] Check for underflow/wrap in hardware loop pass
|
2015-05-14 14:15:08 +00:00 |
hwloop1.ll
|
[Hexagon] Generate more hardware loops
|
2015-05-08 20:18:21 +00:00 |
hwloop2.ll
|
[Hexagon] Generate more hardware loops
|
2015-05-08 20:18:21 +00:00 |
hwloop3.ll
|
[Hexagon] Generate more hardware loops
|
2015-05-08 20:18:21 +00:00 |
hwloop4.ll
|
[Hexagon] Generate more hardware loops
|
2015-05-08 20:18:21 +00:00 |
hwloop5.ll
|
[Hexagon] Generate hardware loop for a vectorized loop
|
2015-05-14 20:36:19 +00:00 |
i1_VarArg.ll
|
Add hexagonv55 and hexagonv60 as recognized CPUs, make v60 the default
|
2015-11-25 20:30:59 +00:00 |
i8_VarArg.ll
|
Add hexagonv55 and hexagonv60 as recognized CPUs, make v60 the default
|
2015-11-25 20:30:59 +00:00 |
i16_VarArg.ll
|
Add hexagonv55 and hexagonv60 as recognized CPUs, make v60 the default
|
2015-11-25 20:30:59 +00:00 |
idxload-with-zero-offset.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
ifcvt-diamond-bad.ll
|
Proper handling of diamond-like cases in if-conversion
|
2016-01-20 13:14:52 +00:00 |
ifcvt-edge-weight.ll
|
Replace all weight-based interfaces in MBB with probability-based interfaces, and update all uses of old interfaces.
|
2015-12-01 05:29:22 +00:00 |
indirect-br.ll
|
…
|
|
insert-basic.ll
|
[Hexagon] Generate "insert" instructions more aggressively
|
2015-07-08 14:47:34 +00:00 |
insert4.ll
|
[Hexagon] Expand pseudo instruction Insert4
|
2016-01-14 15:37:16 +00:00 |
lit.local.cfg
|
…
|
|
loadi1-G0.ll
|
[Hexagon] Adding a number of other tests for min/max instructions and loading i1s.
|
2015-06-17 20:29:33 +00:00 |
loadi1-v4-G0.ll
|
[Hexagon] Adding a number of other tests for min/max instructions and loading i1s.
|
2015-06-17 20:29:33 +00:00 |
loadi1-v4.ll
|
[Hexagon] Adding a number of other tests for min/max instructions and loading i1s.
|
2015-06-17 20:29:33 +00:00 |
loadi1.ll
|
[Hexagon] Adding a number of other tests for min/max instructions and loading i1s.
|
2015-06-17 20:29:33 +00:00 |
macint.ll
|
[Hexagon] Some cleanup of instruction selection code
|
2015-04-22 21:17:00 +00:00 |
maxd.ll
|
[Hexagon] Adding a number of other tests for min/max instructions and loading i1s.
|
2015-06-17 20:29:33 +00:00 |
maxh.ll
|
[Hexagon] Adding a number of other tests for min/max instructions and loading i1s.
|
2015-06-17 20:29:33 +00:00 |
maxud.ll
|
[Hexagon] Adding a number of other tests for min/max instructions and loading i1s.
|
2015-06-17 20:29:33 +00:00 |
maxuw.ll
|
[Hexagon] Adding a number of other tests for min/max instructions and loading i1s.
|
2015-06-17 20:29:33 +00:00 |
maxw.ll
|
[Hexagon] Adding a number of other tests for min/max instructions and loading i1s.
|
2015-06-17 20:29:33 +00:00 |
mem-fi-add.ll
|
Revert "Change memcpy/memset/memmove to have dest and source alignments."
|
2015-11-19 05:56:52 +00:00 |
memcpy-likely-aligned.ll
|
[Hexagon] Make memcpy lowering thread-safe
|
2015-12-16 17:29:37 +00:00 |
memops.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
memops1.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
memops2.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
memops3.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
mind.ll
|
[Hexagon] Adding a number of other tests for min/max instructions and loading i1s.
|
2015-06-17 20:29:33 +00:00 |
minu-zext-8.ll
|
[Hexagon] Adding a number of other tests for min/max instructions and loading i1s.
|
2015-06-17 20:29:33 +00:00 |
minu-zext-16.ll
|
[Hexagon] Adding a number of other tests for min/max instructions and loading i1s.
|
2015-06-17 20:29:33 +00:00 |
minud.ll
|
[Hexagon] Adding a number of other tests for min/max instructions and loading i1s.
|
2015-06-17 20:29:33 +00:00 |
minuw.ll
|
[Hexagon] Adding a number of other tests for min/max instructions and loading i1s.
|
2015-06-17 20:29:33 +00:00 |
minw.ll
|
[Hexagon] Adding a number of other tests for min/max instructions and loading i1s.
|
2015-06-17 20:29:33 +00:00 |
misaligned-access.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
mpy.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
mux-basic.ll
|
[Hexagon] Generate MUX from conditional transfers when dot-new not possible
|
2015-07-20 21:23:25 +00:00 |
newvaluejump.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
newvaluejump2.ll
|
[Hexagon] Some cleanup of instruction selection code
|
2015-04-22 21:17:00 +00:00 |
newvaluestore.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
opt-fabs.ll
|
[Hexagon] Bit-based instruction simplification
|
2015-10-20 22:57:13 +00:00 |
opt-fneg.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
packetize_cond_inst.ll
|
…
|
|
pic-jumptables.ll
|
[Hexagon] Add PIC support
|
2015-12-18 20:19:30 +00:00 |
pic-simple.ll
|
[Hexagon] Add PIC support
|
2015-12-18 20:19:30 +00:00 |
pic-static.ll
|
[Hexagon] Add PIC support
|
2015-12-18 20:19:30 +00:00 |
postinc-load.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
postinc-offset.ll
|
[Hexagon] Implement RDF-based post-RA optimizations
|
2016-01-12 19:09:01 +00:00 |
postinc-store.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
pred-absolute-store.ll
|
[Hexagon] Removing unused patterns.
|
2015-03-09 23:08:46 +00:00 |
pred-gp.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
pred-instrs.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
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2015-02-27 21:17:42 +00:00 |
predicate-copy.ll
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…
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|
predicate-logical.ll
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[Hexagon] Generate instructions for operations on predicate registers
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2015-07-14 19:30:21 +00:00 |
predicate-rcmp.ll
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[Hexagon] Generate instructions for operations on predicate registers
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2015-07-14 19:30:21 +00:00 |
rdf-copy.ll
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Fix tests that used CHECK-NEXT-NOT and CHECK-DAG-NOT.
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2016-02-26 19:40:34 +00:00 |
rdf-dead-loop.ll
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[Hexagon] Implement RDF-based post-RA optimizations
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2016-01-12 19:09:01 +00:00 |
reg-scavengebug-3.ll
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[Hexagon] Optimize stack slot spills
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2016-02-12 22:53:35 +00:00 |
relax.ll
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[Hexagon] Delay emission of CFI instructions
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2015-10-19 17:46:01 +00:00 |
remove-endloop.ll
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[Hexagon] Update AnalyzeBranch, etc target hooks
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2015-05-08 16:16:29 +00:00 |
remove_lsr.ll
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[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
sdr-basic.ll
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[Hexagon] Split double registers
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2015-10-16 20:38:54 +00:00 |
sdr-shr32.ll
|
[Hexagon] Split double registers
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2015-10-16 20:38:54 +00:00 |
shrink-frame-basic.ll
|
[Hexagon] Shrink-wrap stack frame (Hexagon-specific)
|
2015-04-23 16:05:39 +00:00 |
signed_immediates.ll
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[Hexagon] Adding decoders for signed operands and ensuring all signed operand types disassemble correctly.
|
2015-06-10 16:52:32 +00:00 |
simple_addend.ll
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[Hexagon] Delay emission of CFI instructions
|
2015-10-19 17:46:01 +00:00 |
simpletailcall.ll
|
…
|
|
split-const32-const64.ll
|
…
|
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stack-align1.ll
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[Hexagon] Add testcases for stack alignment and variable-sized objects
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2015-04-23 15:12:49 +00:00 |
stack-align2.ll
|
[Hexagon] Add testcases for stack alignment and variable-sized objects
|
2015-04-23 15:12:49 +00:00 |
stack-alloca1.ll
|
[Hexagon] Add testcases for stack alignment and variable-sized objects
|
2015-04-23 15:12:49 +00:00 |
stack-alloca2.ll
|
[Hexagon] Add testcases for stack alignment and variable-sized objects
|
2015-04-23 15:12:49 +00:00 |
static.ll
|
[Hexagon] Fixing load instruction parsing and reenabling tests.
|
2015-11-10 00:02:27 +00:00 |
store-widen-aliased-load.ll
|
[Hexagon] Merge adjacent stores
|
2015-10-16 19:43:56 +00:00 |
store-widen-negv.ll
|
[Hexagon] Merge adjacent stores
|
2015-10-16 19:43:56 +00:00 |
store-widen-negv2.ll
|
[Hexagon] Merge adjacent stores
|
2015-10-16 19:43:56 +00:00 |
store-widen.ll
|
[Hexagon] Merge adjacent stores
|
2015-10-16 19:43:56 +00:00 |
struct_args.ll
|
[Hexagon] Split double registers
|
2015-10-16 20:38:54 +00:00 |
struct_args_large.ll
|
The canonical way to XFAIL a test for all targets is XFAIL: *, not XFAIL:
|
2016-02-04 16:21:38 +00:00 |
sube.ll
|
[Hexagon] Preprocess mapped instructions before lowering to MC
|
2015-12-15 17:05:45 +00:00 |
tail-call-mem-intrinsics.ll
|
Revert "Change memcpy/memset/memmove to have dest and source alignments."
|
2015-11-19 05:56:52 +00:00 |
tail-call-trunc.ll
|
…
|
|
tail-dup-subreg-abort.ll
|
Tail duplication can mix incompatible registers in phi nodes
|
2015-10-21 02:40:06 +00:00 |
tfr-to-combine.ll
|
[Hexagon] Split double registers
|
2015-10-16 20:38:54 +00:00 |
tls_pic.ll
|
Fix tests that used CHECK-NEXT-NOT and CHECK-DAG-NOT.
|
2016-02-26 19:40:34 +00:00 |
tls_static.ll
|
[Hexagon] Implement TLS support
|
2016-02-18 15:42:57 +00:00 |
union-1.ll
|
[Hexagon] Split double registers
|
2015-10-16 20:38:54 +00:00 |
usr-ovf-dep.ll
|
[Hexagon] Printing packet brackets when asm printing and adding a number of tests that test packet brackets.
|
2015-06-18 20:43:50 +00:00 |
v60Intrins.ll
|
[Hexagon] Hexagon V60 HVX intrinsic defintions
|
2015-11-26 16:54:33 +00:00 |
v60Vasr.ll
|
[Hexagon] Adding v60 test, vasr in particular.
|
2015-12-07 18:52:39 +00:00 |
v60small.ll
|
[Hexagon] Hexagon V60 HVX intrinsic defintions
|
2015-11-26 16:54:33 +00:00 |
vaddh.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
validate-offset.ll
|
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
|
2015-02-27 21:17:42 +00:00 |
vec-pred-spill1.ll
|
[Hexagon] Optimize stack slot spills
|
2016-02-12 22:53:35 +00:00 |
vector-align.ll
|
[Hexagon] Specify vector alignment in DataLayout string
|
2016-02-12 14:47:38 +00:00 |
zextloadi1.ll
|
[Hexagon] Fixing store instructions and reenabling a few more tests.
|
2015-11-10 00:22:00 +00:00 |