llvm-project/llvm
Jannik Silvanus 607f8ced39 [AMDGPU]: Fix failing assertion in SIMachineScheduler
This fixes the assertion failure "Loop in the Block Graph!".

SIMachineScheduler groups instructions into blocks (also referred to
as coloring or groups) and then performs a two-level scheduling:
inter-block scheduling, and intra-block scheduling.

This approach requires that the dependency graph on the blocks which
is obtained by contracting the blocks in the original dependency graph
is acyclic. In other words: Whenever A and B end up in the same block,
all vertices on a path from A to B must be in the same block.

When compiling an example consisting of an export followed by
a buffer store, we see a dependency between these two. This dependency
may be false, but that is a different issue.
This dependency was not correctly accounted for by SiMachineScheduler.

A new test case si-scheduler-exports.ll demonstrating this is
also added in this commit.

The problematic part of SiMachineScheduler was a post-optimization of
the block assignment that tried to group all export instructions into
a separate export block for better execution performance. This routine
correctly checked that any paths from exports to exports did not
contain any non-exports, but not vice-versa: In case of an export with
a non-export successor dependency, that single export was moved
to a separate block, which could then be both a successor and a
predecessor block of a non-export block.

As fix, we now skip export grouping if there are exports with direct
non-export successor dependencies. This fixes the issue at hand,
but is slightly pessimistic:
We *could* group all exports into a separate block that have neither
direct nor indirect export successor dependencies.
We will review the potential performance impact and potentially
revisit with a more sophisticated implementation.

Note that just grouping all exports without direct non-export successor
dependencies could still lead to illegal blocks, since non-export A
could depend on export B that depends on export C. In that case,
export C has no non-export successor, but still may not be grouped
into an export block.
2022-04-21 14:52:29 +01:00
..
benchmarks
bindings [Pipelines] Remove Legacy Passes in Coroutines 2022-04-21 10:59:11 +08:00
cmake [CMake] Check for problematic MSVC + /arch:AVX configuration 2022-04-21 09:46:44 +02:00
docs [Debugify] Limit number of processed functions for original mode 2022-04-21 13:58:17 +02:00
examples [examples][ORC] Add a new example showing the ORCv2 removable code APIs. 2022-04-12 15:05:07 -07:00
include [Pipelines] Remove Legacy Passes in Coroutines 2022-04-21 10:59:11 +08:00
lib [AMDGPU]: Fix failing assertion in SIMachineScheduler 2022-04-21 14:52:29 +01:00
projects
resources
runtimes Revert "[runtimes] Create Tests.cmake if it does not exist" 2022-04-01 09:29:54 -07:00
test [AMDGPU]: Fix failing assertion in SIMachineScheduler 2022-04-21 14:52:29 +01:00
tools [Pipelines] Remove Legacy Passes in Coroutines 2022-04-21 10:59:11 +08:00
unittests GlobalISel: Add LegalizeMutations to help use More/FewerElements 2022-04-19 21:04:32 -04:00
utils [clang-tblgen] Automatically document options values 2022-04-20 22:00:06 +02:00
.clang-format
.clang-tidy
.gitattributes
.gitignore
CMakeLists.txt [cmake] Remove LLVM_ENABLE_NEW_PASS_MANAGER cmake option 2022-04-06 09:52:21 +02:00
CODE_OWNERS.TXT [SPIR-V](1/6) Add stub for SPIRV backend 2022-04-20 01:10:25 +02:00
CREDITS.TXT
LICENSE.TXT
README.txt
RELEASE_TESTERS.TXT
configure
llvm.spec.in

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