llvm-project/mlir
River Riddle fd01d8626c [mlir] Rewrite the internal representation of OpResult to be optimized for memory.
Summary:
This changes the implementation of OpResult to have some of the results be represented inline in Value, via a pointer int pair of Operation*+result number, and the rest being trailing objects on the main operation. The full details of the new representation is detailed in the proposal here:
https://groups.google.com/a/tensorflow.org/g/mlir/c/XXzzKhqqF_0/m/v6bKb08WCgAJ

The only difference between here and the above proposal is that we only steal 2-bits for the Value kind instead of 3. This means that we can only fit 2-results inline instead of 6. This allows for other users to steal the final bit for PointerUnion/etc. If necessary, we can always steal this bit back in the future to save more space if 3-6 results are common enough.

Reviewed By: jpienaar

Differential Revision: https://reviews.llvm.org/D72020
2020-01-02 14:40:09 -08:00
..
docs fix doc grammar-o to cycle bots 2020-01-02 12:11:59 -05:00
examples NFC: Replace ValuePtr with Value and remove it now that Value is value-typed. 2019-12-23 16:36:53 -08:00
include [mlir] Rewrite the internal representation of OpResult to be optimized for memory. 2020-01-02 14:40:09 -08:00
lib [mlir] Rewrite the internal representation of OpResult to be optimized for memory. 2020-01-02 14:40:09 -08:00
test [mlir] Rewrite the internal representation of OpResult to be optimized for memory. 2020-01-02 14:40:09 -08:00
tools [mlir] Only generate default for uncovered cases 2020-01-02 12:55:14 -08:00
unittests NFC: Replace ValuePtr with Value and remove it now that Value is value-typed. 2019-12-23 16:36:53 -08:00
utils [mlir][spirv] Update SPIR-V enums and ops with availability spec 2020-01-02 14:09:02 -05:00
.clang-format [mlir] add .clang-format 2019-03-29 12:41:43 -07:00
.clang-tidy Add a clang-tidy configuration file for MLIR, it is using camelBack for naming at the moment 2019-12-26 21:42:01 +00:00
CMakeLists.txt [mlir] Fix linking with LLD 2020-01-01 17:29:04 -05:00
LICENSE.TXT Add the Apache2 with LLVM exceptions license to MLIR 2019-12-24 00:58:06 -08:00
README.md mlir README.md: Fix the syntax 2019-12-24 13:31:07 +01:00

README.md

Multi-Level Intermediate Representation

See https://mlir.llvm.org/ for more information.