forked from OSchip/llvm-project
23 lines
944 B
LLVM
23 lines
944 B
LLVM
; RUN: opt < %s -cost-model -analyze -mtriple=arm64-apple-ios -mcpu=cyclone | FileCheck %s
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target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-a0:0:32-n32-S32"
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; CHECK-LABEL: store
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define void @store() {
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; Stores of <2 x i64> should be expensive because we don't split them and
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; and unaligned 16b stores have bad performance.
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; CHECK: cost of 12 {{.*}} store
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store <2 x i64> undef, <2 x i64> * undef
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; We scalarize the loads/stores because there is no vector register name for
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; these types (they get extended to v.4h/v.2s).
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; CHECK: cost of 16 {{.*}} store
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store <2 x i8> undef, <2 x i8> * undef
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; CHECK: cost of 64 {{.*}} store
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store <4 x i8> undef, <4 x i8> * undef
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; CHECK: cost of 16 {{.*}} load
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load <2 x i8> , <2 x i8> * undef
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; CHECK: cost of 64 {{.*}} load
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load <4 x i8> , <4 x i8> * undef
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ret void
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}
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