forked from OSchip/llvm-project
75 lines
1.5 KiB
ArmAsm
75 lines
1.5 KiB
ArmAsm
// This test checks that the gold linker style veneer are properly handled
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// by BOLT.
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// Strip .rela.mytext section to simulate inserted by a linker veneers
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// that does not contain relocations.
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# RUN: llvm-mc -filetype=obj -triple aarch64-unknown-unknown \
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# RUN: %s -o %t.o
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# RUN: %clang %cflags -fPIC -pie %t.o -o %t.exe -nostdlib \
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# RUN: -fuse-ld=lld -Wl,--no-relax -Wl,-q
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# RUN: llvm-objcopy --remove-section .rela.mytext %t.exe
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# RUN: llvm-objdump -d -j .mytext %t.exe | \
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# RUN: FileCheck --check-prefix=CHECKVENEER %s
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# RUN: llvm-bolt %t.exe -o %t.bolt --elim-link-veneers=true \
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# RUN: --lite=0 --use-old-text=0
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# RUN: llvm-objdump -d -j .text %t.bolt | FileCheck %s
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.text
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.balign 4
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.global dummy
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.type dummy, %function
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dummy:
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adrp x1, dummy
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ret
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.size dummy, .-dummy
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.section ".mytext", "ax"
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.balign 4
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.global foo
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.type foo, %function
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foo:
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# CHECK: <foo>:
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# CHECK-NEXT : {{.*}} bl {{.*}} <foo2>
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bl .L2
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ret
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.size foo, .-foo
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.global foo2
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.type foo2, %function
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foo2:
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# CHECK: <foo2>:
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# CHECK-NEXT : {{.*}} bl {{.*}} <foo2>
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bl .L2
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ret
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.size foo2, .-foo2
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.global _start
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.type _start, %function
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_start:
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# CHECK: <_start>:
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# CHECK-NEXT: {{.*}} bl {{.*}} <foo>
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bl .L1
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adr x0, .L0
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ret
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.L0:
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.xword 0
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.size _start, .-_start
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.L1:
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# CHECKVENEER: adrp
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# CHECKVENEER-NEXT: add
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# CHECKVENEER-NEXT: br
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# CHECKVENEER-NEXT: nop
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adrp x16, foo
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add x16, x16, #:lo12:foo
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br x16
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nop
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.L2:
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# CHECKVENEER-NEXT: adrp
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# CHECKVENEER-NEXT: add
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# CHECKVENEER-NEXT: br
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# CHECKVENEER-NEXT: nop
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adrp x16, foo2
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add x16, x16, #:lo12:foo2
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br x16
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nop
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