forked from OSchip/llvm-project
119 lines
4.4 KiB
ArmAsm
119 lines
4.4 KiB
ArmAsm
// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-objdump -d - | FileCheck %s
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// Test that we avoid relaxing these instructions and instead generate versions
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// that use 8-bit immediate values.
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bar:
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// CHECK: Disassembly of section imul:
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// CHECK-NEXT: imul:
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// CHECK-NEXT: 0: 66 6b db 80 imulw $-128, %bx, %bx
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// CHECK-NEXT: 4: 66 6b 1c 25 00 00 00 00 7f imulw $127, 0, %bx
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// CHECK-NEXT: d: 6b db 00 imull $0, %ebx, %ebx
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// CHECK-NEXT: 10: 6b 1c 25 00 00 00 00 01 imull $1, 0, %ebx
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// CHECK-NEXT: 18: 48 6b db ff imulq $-1, %rbx, %rbx
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// CHECK-NEXT: 1c: 48 6b 1c 25 00 00 00 00 2a imulq $42, 0, %rbx
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.section imul,"x"
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imul $-128, %bx, %bx
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imul $127, bar, %bx
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imul $0, %ebx, %ebx
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imul $1, bar, %ebx
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imul $-1, %rbx, %rbx
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imul $42, bar, %rbx
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// CHECK: Disassembly of section and:
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// CHECK-NEXT: and:
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// CHECK-NEXT: 0: 66 83 e3 7f andw $127, %bx
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// CHECK-NEXT: 4: 66 83 24 25 00 00 00 00 00 andw $0, 0
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// CHECK-NEXT: d: 83 e3 01 andl $1, %ebx
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// CHECK-NEXT: 10: 83 24 25 00 00 00 00 ff andl $-1, 0
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// CHECK-NEXT: 18: 48 83 e3 2a andq $42, %rbx
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// CHECK-NEXT: 1c: 48 83 24 25 00 00 00 00 80 andq $-128, 0
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.section and,"x"
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and $127, %bx
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andw $0, bar
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and $1, %ebx
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andl $-1, bar
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and $42, %rbx
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andq $-128, bar
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// CHECK: Disassembly of section or:
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// CHECK-NEXT: or:
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// CHECK-NEXT: 0: 66 83 cb 00 orw $0, %bx
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// CHECK-NEXT: 4: 66 83 0c 25 00 00 00 00 01 orw $1, 0
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// CHECK-NEXT: d: 83 cb ff orl $-1, %ebx
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// CHECK-NEXT: 10: 83 0c 25 00 00 00 00 2a orl $42, 0
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// CHECK-NEXT: 18: 48 83 cb 80 orq $-128, %rbx
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// CHECK-NEXT: 1c: 48 83 0c 25 00 00 00 00 7f orq $127, 0
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.section or,"x"
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or $0, %bx
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orw $1, bar
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or $-1, %ebx
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orl $42, bar
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or $-128, %rbx
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orq $127, bar
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// CHECK: Disassembly of section xor:
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// CHECK-NEXT: xor:
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// CHECK-NEXT: 0: 66 83 f3 01 xorw $1, %bx
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// CHECK-NEXT: 4: 66 83 34 25 00 00 00 00 ff xorw $-1, 0
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// CHECK-NEXT: d: 83 f3 2a xorl $42, %ebx
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// CHECK-NEXT: 10: 83 34 25 00 00 00 00 80 xorl $-128, 0
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// CHECK-NEXT: 18: 48 83 f3 7f xorq $127, %rbx
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// CHECK-NEXT: 1c: 48 83 34 25 00 00 00 00 00 xorq $0, 0
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.section xor,"x"
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xor $1, %bx
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xorw $-1, bar
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xor $42, %ebx
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xorl $-128, bar
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xor $127, %rbx
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xorq $0, bar
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// CHECK: Disassembly of section add:
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// CHECK-NEXT: add:
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// CHECK-NEXT: 0: 66 83 c3 ff addw $-1, %bx
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// CHECK-NEXT: 4: 66 83 04 25 00 00 00 00 2a addw $42, 0
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// CHECK-NEXT: d: 83 c3 80 addl $-128, %ebx
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// CHECK-NEXT: 10: 83 04 25 00 00 00 00 7f addl $127, 0
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// CHECK-NEXT: 18: 48 83 c3 00 addq $0, %rbx
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// CHECK-NEXT: 1c: 48 83 04 25 00 00 00 00 01 addq $1, 0
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.section add,"x"
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add $-1, %bx
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addw $42, bar
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add $-128, %ebx
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addl $127, bar
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add $0, %rbx
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addq $1, bar
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// CHECK: Disassembly of section sub:
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// CHECK-NEXT: sub:
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// CHECK-NEXT: 0: 66 83 eb 2a subw $42, %bx
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// CHECK-NEXT: 4: 66 83 2c 25 00 00 00 00 80 subw $-128, 0
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// CHECK-NEXT: d: 83 eb 7f subl $127, %ebx
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// CHECK-NEXT: 10: 83 2c 25 00 00 00 00 00 subl $0, 0
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// CHECK-NEXT: 18: 48 83 eb 01 subq $1, %rbx
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// CHECK-NEXT: 1c: 48 83 2c 25 00 00 00 00 ff subq $-1, 0
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.section sub,"x"
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sub $42, %bx
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subw $-128, bar
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sub $127, %ebx
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subl $0, bar
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sub $1, %rbx
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subq $-1, bar
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// CHECK: Disassembly of section cmp:
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// CHECK-NEXT: cmp:
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// CHECK-NEXT: 0: 66 83 fb 80 cmpw $-128, %bx
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// CHECK-NEXT: 4: 66 83 3c 25 00 00 00 00 7f cmpw $127, 0
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// CHECK-NEXT: d: 83 fb 00 cmpl $0, %ebx
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// CHECK-NEXT: 10: 83 3c 25 00 00 00 00 01 cmpl $1, 0
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// CHECK-NEXT: 18: 48 83 fb ff cmpq $-1, %rbx
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// CHECK-NEXT: 1c: 48 83 3c 25 00 00 00 00 2a cmpq $42, 0
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.section cmp,"x"
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cmp $-128, %bx
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cmpw $127, bar
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cmp $0, %ebx
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cmpl $1, bar
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cmp $-1, %rbx
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cmpq $42, bar
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