forked from OSchip/llvm-project
39 lines
1.3 KiB
ArmAsm
39 lines
1.3 KiB
ArmAsm
// REQUIRES: aarch64
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// RUN: llvm-mc -filetype=obj -triple=aarch64-none-linux %s -o %t.o
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// RUN: ld.lld -fix-cortex-a53-843419 %t.o -o %t2
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// RUN: llvm-objdump --triple=aarch64-linux-gnu -d %t2 | FileCheck %s
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// The following code sequence is covered by the TLS IE to LE relaxation. It
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// transforms the ADRP, LDR to MOVZ, MOVK. The former can trigger a
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// cortex-a53-843419 patch, whereas the latter can not. As both
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// relaxation and patching transform instructions very late in the
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// link there is a possibility of them both being simultaneously
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// applied. In this case the relaxed sequence is immune from the erratum so we
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// prefer to keep it.
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.text
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.balign 4096
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.space 4096 - 8
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.globl _start
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.type _start,@function
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_start:
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mrs x1, tpidr_el0
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adrp x0, :gottprel:v
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ldr x1, [x0, #:gottprel_lo12:v]
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adrp x0, :gottprel:v
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ldr x1, [x0, #:gottprel_lo12:v]
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ret
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// CHECK: <_start>:
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// CHECK-NEXT: 211ff8: 41 d0 3b d5 mrs x1, TPIDR_EL0
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// CHECK-NEXT: 211ffc: 00 00 a0 d2 movz x0, #0, lsl #16
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// CHECK-NEXT: 212000: 01 02 80 f2 movk x1, #16
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// CHECK-NEXT: 212004: 00 00 a0 d2 movz x0, #0, lsl #16
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// CHECK-NEXT: 212008: 01 02 80 f2 movk x1, #16
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// CHECK-NEXT: 21200c: c0 03 5f d6 ret
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.type v,@object
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.section .tbss,"awT",@nobits
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.globl v
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v:
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.word 0
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