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llvm-project/llvm/test/MC/Disassembler/Mips/mips32r5
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Simon Dardis 51a7ae2a29 [mips] Place certain 64 bit FPU instructions in their own decoder namespace 
Previously, instructions that were defined to use the FGR64 register class
were associated with the Mips64 table which was incorrect.

Reviewers: nitesh.jain, atanasyan

Differential Revision: https://reviews.llvm.org/D38454

llvm-svn: 314976
 		2017-10-05 10:27:37 +00:00
..
invalid-xfail.txt
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valid-mips32r5-el.txt [mips] Place certain 64 bit FPU instructions in their own decoder namespace 2017-10-05 10:27:37 +00:00
valid-mips32r5.txt [mips] Place certain 64 bit FPU instructions in their own decoder namespace 2017-10-05 10:27:37 +00:00
valid-xfail-mips32r5.txt Recommit: "[mips] Add rsqrt, recip for MIPS" 2016-10-05 16:11:01 +00:00
valid-xfail.txt
…