forked from OSchip/llvm-project
84 lines
2.4 KiB
YAML
84 lines
2.4 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
|
|
# RUN: llc -march=amdgcn -mcpu=tahiti -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
|
|
# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
|
|
|
|
---
|
|
name: rcp_s32_vs
|
|
legalized: true
|
|
regBankSelected: true
|
|
tracksRegLiveness: true
|
|
|
|
body: |
|
|
bb.0:
|
|
liveins: $sgpr0
|
|
|
|
; CHECK-LABEL: name: rcp_s32_vs
|
|
; CHECK: liveins: $sgpr0
|
|
; CHECK: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
|
|
; CHECK: [[V_RCP_F32_e64_:%[0-9]+]]:vgpr_32 = V_RCP_F32_e64 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
|
|
; CHECK: S_ENDPGM 0, implicit [[V_RCP_F32_e64_]]
|
|
%0:sgpr(s32) = COPY $sgpr0
|
|
%1:vgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.rcp), %0
|
|
S_ENDPGM 0, implicit %1
|
|
...
|
|
|
|
---
|
|
name: rcp_s32_vv
|
|
legalized: true
|
|
regBankSelected: true
|
|
tracksRegLiveness: true
|
|
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0
|
|
|
|
; CHECK-LABEL: name: rcp_s32_vv
|
|
; CHECK: liveins: $vgpr0
|
|
; CHECK: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
|
|
; CHECK: [[V_RCP_F32_e64_:%[0-9]+]]:vgpr_32 = V_RCP_F32_e64 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
|
|
; CHECK: S_ENDPGM 0, implicit [[V_RCP_F32_e64_]]
|
|
%0:vgpr(s32) = COPY $vgpr0
|
|
%1:vgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.rcp), %0
|
|
S_ENDPGM 0, implicit %1
|
|
...
|
|
|
|
---
|
|
name: rcp_s64_vs
|
|
legalized: true
|
|
regBankSelected: true
|
|
tracksRegLiveness: true
|
|
|
|
body: |
|
|
bb.0:
|
|
liveins: $sgpr0_sgpr1
|
|
|
|
; CHECK-LABEL: name: rcp_s64_vs
|
|
; CHECK: liveins: $sgpr0_sgpr1
|
|
; CHECK: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
|
|
; CHECK: [[V_RCP_F64_e64_:%[0-9]+]]:vreg_64 = V_RCP_F64_e64 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
|
|
; CHECK: S_ENDPGM 0, implicit [[V_RCP_F64_e64_]]
|
|
%0:sgpr(s64) = COPY $sgpr0_sgpr1
|
|
%1:vgpr(s64) = G_INTRINSIC intrinsic(@llvm.amdgcn.rcp), %0
|
|
S_ENDPGM 0, implicit %1
|
|
...
|
|
|
|
---
|
|
name: rcp_s64_vv
|
|
legalized: true
|
|
regBankSelected: true
|
|
tracksRegLiveness: true
|
|
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0_vgpr1
|
|
|
|
; CHECK-LABEL: name: rcp_s64_vv
|
|
; CHECK: liveins: $vgpr0_vgpr1
|
|
; CHECK: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
|
; CHECK: [[V_RCP_F64_e64_:%[0-9]+]]:vreg_64 = V_RCP_F64_e64 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
|
|
; CHECK: S_ENDPGM 0, implicit [[V_RCP_F64_e64_]]
|
|
%0:vgpr(s64) = COPY $vgpr0_vgpr1
|
|
%1:vgpr(s64) = G_INTRINSIC intrinsic(@llvm.amdgcn.rcp), %0
|
|
S_ENDPGM 0, implicit %1
|
|
...
|