forked from OSchip/llvm-project
5ee571735d
Place the instruction at the 24th column (0-based indexing), matching
GNU objdump ARM/AArch64/powerpc/etc when the address is low.
This is beneficial for non-x86 targets which have short instruction
lengths.
```
// GNU objdump AArch64
0: 91001062 add x2, x3, #0x4
400078: 91001062 add x2, x3, #0x4
// llvm-objdump, with this patch
0: 62 10 00 91 add x2, x3, #4
400078: 62 10 00 91 add x2, x3, #4
// llvm-objdump, if we change to print a word instead of bytes in the future
0: 91001062 add x2, x3, #4
400078: 91001062 add x2, x3, #4
// GNU objdump Thumb
0: bf00 nop
// GNU objdump Power ISA 3.1 64-bit instruction
// 0: 00 00 10 04 plwa r3,0
// 4: 00 00 60 a4
```
Reviewed By: jhenderson
Differential Revision: https://reviews.llvm.org/D81590
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| .. | ||
| Analysis | ||
| Assembler | ||
| Bindings | ||
| Bitcode | ||
| BugPoint | ||
| CodeGen | ||
| DebugInfo | ||
| Demangle | ||
| Examples | ||
| ExecutionEngine | ||
| Feature | ||
| FileCheck | ||
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| Integer | ||
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| LTO | ||
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| MachineVerifier | ||
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| ObjectYAML | ||
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| ThinLTO/X86 | ||
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| Verifier | ||
| YAMLParser | ||
| tools | ||
| .clang-format | ||
| CMakeLists.txt | ||
| TestRunner.sh | ||
| lit.cfg.py | ||
| lit.site.cfg.py.in | ||