.. |
AsmParser
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AMDGPU: Consolidate inline immediate predicate functions
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2016-12-05 22:26:17 +00:00 |
Disassembler
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AMDGPU: Disallow exec as SMEM instruction operand
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2016-11-29 19:39:53 +00:00 |
InstPrinter
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AMDGPU: Change how exp is printed
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2016-12-05 20:31:49 +00:00 |
MCTargetDesc
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Check that emitted instructions meet their predicates on all targets except ARM, Mips, and X86.
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2016-11-19 13:05:44 +00:00 |
TargetInfo
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Move the global variables representing each Target behind accessor function
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2016-10-09 23:00:34 +00:00 |
Utils
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AMDGPU: Consolidate inline immediate predicate functions
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2016-12-05 22:26:17 +00:00 |
AMDGPU.h
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[AMDGPU] Add amdgpu-unify-metadata pass
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2016-12-08 19:46:04 +00:00 |
AMDGPU.td
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AMDGPU/SI: Remove XNACK feature from CI
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2016-12-09 19:49:58 +00:00 |
AMDGPUAlwaysInlinePass.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
AMDGPUAnnotateKernelFeatures.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
AMDGPUAnnotateUniformValues.cpp
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[AMDGPU] Scalarization of global uniform loads.
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2016-12-08 17:28:47 +00:00 |
AMDGPUAsmPrinter.cpp
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AMDGPU/SI: Don't reserve FLAT_SCR on non-HSA targets & without stack objects
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2016-12-09 19:49:48 +00:00 |
AMDGPUAsmPrinter.h
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AMDGPU: Emit runtime metadata as a note element in .note section
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2016-11-10 21:18:49 +00:00 |
AMDGPUCallLowering.cpp
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GlobalISel: pass Function to lowerFormalArguments directly (NFC).
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2016-09-21 12:57:35 +00:00 |
AMDGPUCallLowering.h
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GlobalISel: pass Function to lowerFormalArguments directly (NFC).
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2016-09-21 12:57:35 +00:00 |
AMDGPUCallingConv.td
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AMDGPU: Fix kernel argument alignment impacting stack size
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2016-06-18 05:15:53 +00:00 |
AMDGPUCodeGenPrepare.cpp
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AMDGPU: Fix crash on i16 constant expression
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2016-12-06 23:18:06 +00:00 |
AMDGPUFrameLowering.cpp
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MachineFunction: Return reference for getFrameInfo(); NFC
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2016-07-28 18:40:00 +00:00 |
AMDGPUFrameLowering.h
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AMDGPU: Move R600 only pieces into R600 classes
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2016-07-09 18:11:15 +00:00 |
AMDGPUISelDAGToDAG.cpp
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AMDGPU : Add S_SETREG instructions to fix fdiv precision issues.
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2016-12-07 02:42:15 +00:00 |
AMDGPUISelLowering.cpp
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AMDGPU: Fix i128 mul
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2016-12-09 17:49:14 +00:00 |
AMDGPUISelLowering.h
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AMDGPU : Add S_SETREG instructions to fix fdiv precision issues.
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2016-12-07 02:42:15 +00:00 |
AMDGPUInstrInfo.cpp
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MachineScheduler: Export function to construct "default" scheduler.
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2016-11-28 20:11:54 +00:00 |
AMDGPUInstrInfo.h
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MachineScheduler: Export function to construct "default" scheduler.
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2016-11-28 20:11:54 +00:00 |
AMDGPUInstrInfo.td
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AMDGPU : Add S_SETREG instructions to fix fdiv precision issues.
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2016-12-07 02:42:15 +00:00 |
AMDGPUInstructions.td
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[AMDGPU] Add f16 support (VI+)
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2016-11-13 07:01:11 +00:00 |
AMDGPUIntrinsicInfo.cpp
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AMDGPU: Change fdiv lowering based on !fpmath metadata
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2016-07-19 23:16:53 +00:00 |
AMDGPUIntrinsicInfo.h
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AMDGPU: Change fdiv lowering based on !fpmath metadata
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2016-07-19 23:16:53 +00:00 |
AMDGPUIntrinsics.td
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AMDGPU: Remove read_workdim intrinsic
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2016-07-25 20:17:02 +00:00 |
AMDGPUMCInstLower.cpp
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[AMDGPU] Add wave barrier builtin
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2016-11-15 19:00:15 +00:00 |
AMDGPUMCInstLower.h
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Reapply "AMDGPU: Support using tablegened MC pseudo expansions"
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2016-10-06 17:19:11 +00:00 |
AMDGPUMachineFunction.cpp
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AMDGPU: Make AMDGPUMachineFunction fields private
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2016-07-26 16:45:58 +00:00 |
AMDGPUMachineFunction.h
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AMDGPU/SI: Set correct value for amd_kernel_code_t::kernarg_segment_alignment
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2016-12-06 21:53:10 +00:00 |
AMDGPUOpenCLImageTypeLoweringPass.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
AMDGPUPTNote.h
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AMDGPU: Emit runtime metadata as a note element in .note section
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2016-11-10 21:18:49 +00:00 |
AMDGPUPromoteAlloca.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
AMDGPURegisterInfo.cpp
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AMDGPU: Move R600 only pieces into R600 classes
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2016-07-09 18:11:15 +00:00 |
AMDGPURegisterInfo.h
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AMDGPU: Move R600 only pieces into R600 classes
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2016-07-09 18:11:15 +00:00 |
AMDGPURegisterInfo.td
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…
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AMDGPURuntimeMetadata.h
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AMDGPU: Attempt to fix build failure on x86-64 selfhost build
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2016-11-11 02:48:50 +00:00 |
AMDGPUSubtarget.cpp
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[AMDGPU] Scalarization of global uniform loads.
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2016-12-08 17:28:47 +00:00 |
AMDGPUSubtarget.h
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[AMDGPU] Scalarization of global uniform loads.
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2016-12-08 17:28:47 +00:00 |
AMDGPUTargetMachine.cpp
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[AMDGPU] Add amdgpu-unify-metadata pass
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2016-12-08 19:46:04 +00:00 |
AMDGPUTargetMachine.h
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[AMDGPU] Add amdgpu-unify-metadata pass
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2016-12-08 19:46:04 +00:00 |
AMDGPUTargetObjectFile.cpp
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Target: Change various section classifiers in TargetLoweringObjectFile to take a GlobalObject.
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2016-10-24 19:23:39 +00:00 |
AMDGPUTargetObjectFile.h
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Target: Change various section classifiers in TargetLoweringObjectFile to take a GlobalObject.
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2016-10-24 19:23:39 +00:00 |
AMDGPUTargetTransformInfo.cpp
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Add new target hooks for LoadStoreVectorizer
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2016-10-03 10:31:34 +00:00 |
AMDGPUTargetTransformInfo.h
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Do a sweep over move ctors and remove those that are identical to the default.
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2016-10-20 12:20:28 +00:00 |
AMDGPUUnifyMetadata.cpp
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[AMDGPU] Add amdgpu-unify-metadata pass
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2016-12-08 19:46:04 +00:00 |
AMDILCFGStructurizer.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
AMDKernelCodeT.h
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…
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BUFInstructions.td
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AMDGPU: Add VI i16 support
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2016-11-10 16:02:37 +00:00 |
CIInstructions.td
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[AMDGPU] Refactor VOP1 and VOP2 instruction TD definitions
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2016-09-23 09:08:07 +00:00 |
CMakeLists.txt
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[AMDGPU] Add amdgpu-unify-metadata pass
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2016-12-08 19:46:04 +00:00 |
CaymanInstructions.td
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AMDGPU: Select mulhi 24-bit instructions
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2016-08-27 01:32:27 +00:00 |
DSInstructions.td
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AMDGPU: Add VI i16 support
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2016-11-10 16:02:37 +00:00 |
EvergreenInstructions.td
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AMDGPU: Select mulhi 24-bit instructions
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2016-08-27 01:32:27 +00:00 |
FLATInstructions.td
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AMDGPU: Rename flat operands to match mubuf
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2016-11-29 19:30:44 +00:00 |
GCNHazardRecognizer.cpp
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AMDGPU: Rename flat operands to match mubuf
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2016-11-29 19:30:44 +00:00 |
GCNHazardRecognizer.h
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AMDGPU/SI: Handle hazard with s_rfe_b64
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2016-10-27 23:50:21 +00:00 |
GCNSchedStrategy.cpp
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AMDGPU/SI: Allow using SGPRs 96-101 on VI
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2016-12-09 19:49:40 +00:00 |
GCNSchedStrategy.h
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AMDGPU/SI: Implement a custom MachineSchedStrategy
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2016-08-29 19:42:52 +00:00 |
LLVMBuild.txt
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AMDGPU: Prune AMDGPUAsmParser in libdeps.
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2016-07-09 07:54:27 +00:00 |
MIMGInstructions.td
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[AMDGPU] TableGen: change individual instruction flags to bit type from bits<1>
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2016-11-15 13:39:07 +00:00 |
Processors.td
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AMDGPU: Refactor processor definition to use ISA version features
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2016-10-26 16:37:56 +00:00 |
R600ClauseMergePass.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
R600ControlFlowFinalizer.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
R600Defines.h
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AMDGPU: R600 code splitting cleanup
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2016-03-11 08:00:27 +00:00 |
R600EmitClauseMarkers.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
R600ExpandSpecialInstrs.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
R600FrameLowering.cpp
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AMDGPU: Cleanup subtarget handling.
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2016-06-24 06:30:11 +00:00 |
R600FrameLowering.h
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AMDGPU: Cleanup subtarget handling.
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2016-06-24 06:30:11 +00:00 |
R600ISelLowering.cpp
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AMDGPU: Refactor exp instructions
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2016-12-05 20:23:10 +00:00 |
R600ISelLowering.h
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AMDGPU: Fix i1 fp_to_int
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2016-07-22 17:01:21 +00:00 |
R600InstrFormats.td
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AMDGPU/R600: Convert buffer id to VTX_READ input
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2016-08-15 21:38:30 +00:00 |
R600InstrInfo.cpp
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Finish renaming remaining analyzeBranch functions
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2016-09-14 20:43:16 +00:00 |
R600InstrInfo.h
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Finish renaming remaining analyzeBranch functions
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2016-09-14 20:43:16 +00:00 |
R600Instructions.td
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AMDGPU: Refactor exp instructions
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2016-12-05 20:23:10 +00:00 |
R600Intrinsics.td
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AMDGPU: Fix TargetPrefix for remaining r600 intrinsics
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2016-07-15 21:27:08 +00:00 |
R600MachineFunctionInfo.cpp
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AMDGPU: Delete more dead code
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2016-07-22 17:01:25 +00:00 |
R600MachineFunctionInfo.h
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AMDGPU: Delete more dead code
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2016-07-22 17:01:25 +00:00 |
R600MachineScheduler.cpp
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CodeGen: Use MachineInstr& in TargetInstrInfo, NFC
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2016-06-30 00:01:54 +00:00 |
R600MachineScheduler.h
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AMDGPU: Cleanup subtarget handling.
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2016-06-24 06:30:11 +00:00 |
R600OptimizeVectorRegisters.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
R600Packetizer.cpp
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Fix spelling mistakes in AMDGPU target comments. NFC.
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2016-11-18 11:04:02 +00:00 |
R600RegisterInfo.cpp
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AMDGPU: Move R600 only pieces into R600 classes
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2016-07-09 18:11:15 +00:00 |
R600RegisterInfo.h
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AMDGPU: Move R600 only pieces into R600 classes
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2016-07-09 18:11:15 +00:00 |
R600RegisterInfo.td
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…
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R600Schedule.td
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AMDGPU: Fix trailing whitespace
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2016-06-10 02:18:02 +00:00 |
R700Instructions.td
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…
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SIAnnotateControlFlow.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
SIDebuggerInsertNops.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
SIDefines.h
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AMDGPU: Clean up instruction bits
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2016-12-09 17:49:08 +00:00 |
SIFixControlFlowLiveIntervals.cpp
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Use StringRef in Pass/PassManager APIs (NFC)
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2016-10-01 02:56:57 +00:00 |
SIFixSGPRCopies.cpp
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AMDGPU/SI: Don't move copies of immediates to the VALU
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2016-12-06 21:13:30 +00:00 |
SIFoldOperands.cpp
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AMDGPU : Add S_SETREG instructions to fix fdiv precision issues.
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2016-12-07 02:42:15 +00:00 |
SIFrameLowering.cpp
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AMDGPU: Fix using incorrect private resource with no allocation
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2016-10-28 19:43:31 +00:00 |
SIFrameLowering.h
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AMDGPU: Refactor frame lowering
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2016-08-31 21:52:21 +00:00 |
SIISelLowering.cpp
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AMDGPU: Fix isTypeDesirableForOp for i16
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2016-12-09 17:57:43 +00:00 |
SIISelLowering.h
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AMDGPU: Make f16 ConstantFP legal
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2016-12-08 20:14:46 +00:00 |
SIInsertSkips.cpp
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AMDGPU: Refactor exp instructions
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2016-12-05 20:23:10 +00:00 |
SIInsertWaits.cpp
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AMDGPU: Refactor exp instructions
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2016-12-05 20:23:10 +00:00 |
SIInstrFormats.td
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AMDGPU: Clean up instruction bits
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2016-12-09 17:49:08 +00:00 |
SIInstrInfo.cpp
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AMDGPU : Add S_SETREG instructions to fix fdiv precision issues.
|
2016-12-07 02:42:15 +00:00 |
SIInstrInfo.h
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AMDGPU: Refactor exp instructions
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2016-12-05 20:23:10 +00:00 |
SIInstrInfo.td
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AMDGPU: Assembler support for exp
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2016-12-05 20:42:41 +00:00 |
SIInstructions.td
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AMDGPU: Make f16 ConstantFP legal
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2016-12-08 20:14:46 +00:00 |
SIIntrinsics.td
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AMDGPU: Refactor exp instructions
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2016-12-05 20:23:10 +00:00 |
SILoadStoreOptimizer.cpp
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[AMDGPU][CodeGen] To improve CGEMM performance: combine LDS reads.
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2016-11-03 14:37:13 +00:00 |
SILowerControlFlow.cpp
|
[AMDGPU] Allow hoisting of comparisons out of a loop and eliminate condition copies
|
2016-11-28 18:58:49 +00:00 |
SILowerI1Copies.cpp
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[AMDGPU] Allow hoisting of comparisons out of a loop and eliminate condition copies
|
2016-11-28 18:58:49 +00:00 |
SIMachineFunctionInfo.cpp
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AMDGPU/SI: Add support for triples with the mesa3d operating system
|
2016-09-16 21:34:26 +00:00 |
SIMachineFunctionInfo.h
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[AMDGPU] Wave and register controls
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2016-09-06 20:22:28 +00:00 |
SIMachineScheduler.cpp
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Fix spelling mistakes in AMDGPU target comments. NFC.
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2016-11-18 11:04:02 +00:00 |
SIMachineScheduler.h
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AMDGPU: R600 code splitting cleanup
|
2016-03-11 08:00:27 +00:00 |
SIOptimizeExecMasking.cpp
|
AMDGPU: Fix use-after-free in SIOptimizeExecMasking
|
2016-10-07 08:40:14 +00:00 |
SIRegisterInfo.cpp
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AMDGPU/SI: Don't reserve XNACK when it's disabled
|
2016-12-09 19:49:54 +00:00 |
SIRegisterInfo.h
|
AMDGPU/SI: Don't reserve FLAT_SCR on non-HSA targets & without stack objects
|
2016-12-09 19:49:48 +00:00 |
SIRegisterInfo.td
|
AMDGPU: Allow TBA, TMA, TTMP* registers with SMEM instructions
|
2016-12-09 17:49:11 +00:00 |
SISchedule.td
|
AMDGPU/SI: Implement a custom MachineSchedStrategy
|
2016-08-29 19:42:52 +00:00 |
SIShrinkInstructions.cpp
|
[AMDGPU] Add f16 support (VI+)
|
2016-11-13 07:01:11 +00:00 |
SITypeRewriter.cpp
|
Use StringRef in Pass/PassManager APIs (NFC)
|
2016-10-01 02:56:57 +00:00 |
SIWholeQuadMode.cpp
|
AMDGPU/SI: Add back reverted SGPR spilling code, but disable it
|
2016-11-25 17:37:09 +00:00 |
SMInstructions.td
|
[AMDGPU] Scalarization of global uniform loads.
|
2016-12-08 17:28:47 +00:00 |
SOPInstructions.td
|
AMDGPU : Add S_SETREG instructions to fix fdiv precision issues.
|
2016-12-07 02:42:15 +00:00 |
VIInstrFormats.td
|
[AMDGPU] Refactor VOP1 and VOP2 instruction TD definitions
|
2016-09-23 09:08:07 +00:00 |
VIInstructions.td
|
AMDGPU: Add VI i16 support
|
2016-11-10 16:02:37 +00:00 |
VOP1Instructions.td
|
Check that emitted instructions meet their predicates on all targets except ARM, Mips, and X86.
|
2016-11-19 13:05:44 +00:00 |
VOP2Instructions.td
|
AMDGPU: Select i16 instructions to VOP3 forms
|
2016-12-09 06:19:12 +00:00 |
VOP3Instructions.td
|
[AMDGPU] Handle f16 select{_cc}
|
2016-11-16 03:16:26 +00:00 |
VOPCInstructions.td
|
[AMDGPU] Add f16 support (VI+)
|
2016-11-13 07:01:11 +00:00 |
VOPInstructions.td
|
Fix spelling mistakes in AMDGPU target comments. NFC.
|
2016-11-18 11:04:02 +00:00 |