forked from OSchip/llvm-project
51 lines
1.5 KiB
C++
51 lines
1.5 KiB
C++
//===-- RISCVMCInstLower.cpp - Convert RISCV MachineInstr to an MCInst ------=//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains code to lower RISCV MachineInstrs to their corresponding
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// MCInst records.
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//
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//===----------------------------------------------------------------------===//
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#include "RISCV.h"
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#include "llvm/CodeGen/MachineBasicBlock.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/MC/MCAsmInfo.h"
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#include "llvm/MC/MCContext.h"
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#include "llvm/MC/MCExpr.h"
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#include "llvm/MC/MCInst.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/raw_ostream.h"
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using namespace llvm;
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void llvm::LowerRISCVMachineInstrToMCInst(const MachineInstr *MI,
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MCInst &OutMI) {
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OutMI.setOpcode(MI->getOpcode());
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for (const MachineOperand &MO : MI->operands()) {
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MCOperand MCOp;
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switch (MO.getType()) {
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default:
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report_fatal_error(
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"LowerRISCVMachineInstrToMCInst: unknown operand type");
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case MachineOperand::MO_Register:
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// Ignore all implicit register operands.
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if (MO.isImplicit())
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continue;
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MCOp = MCOperand::createReg(MO.getReg());
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break;
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case MachineOperand::MO_Immediate:
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MCOp = MCOperand::createImm(MO.getImm());
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break;
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}
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OutMI.addOperand(MCOp);
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}
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}
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