| .. |
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AsmParser
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[AMDGPU][MC] Added validation of image dst/data size (must match dmask and tfe)
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2018-01-26 16:42:51 +00:00 |
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Disassembler
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[AMDGPU][MC] Added support of 64-bit image atomics
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2018-01-26 15:43:29 +00:00 |
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InstPrinter
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[AMDGPU] Add HW_REG_SH_MEM_BASES symbolic name for s_getreg_b32
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2018-01-15 18:49:15 +00:00 |
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MCTargetDesc
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[AMDGPU][MC][GFX9] Enable inline constants for SDWA operands
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2018-01-17 14:00:48 +00:00 |
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TargetInfo
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Add backend name to Target to enable runtime info to be fed back into TableGen
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2017-11-15 23:55:44 +00:00 |
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Utils
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[AMDGPU][MC] Added support of 64-bit image atomics
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2018-01-26 15:43:29 +00:00 |
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AMDGPU.h
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[AMDGPU] Clean up symbols in the global namespace.
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2017-10-31 23:21:30 +00:00 |
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AMDGPU.td
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AMDGPU/SI: Add d16 support for buffer intrinsics.
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2018-01-12 21:12:19 +00:00 |
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AMDGPUAliasAnalysis.cpp
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[AMDGPU] calling conventions for AMDPAL OS type
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2017-09-29 09:51:22 +00:00 |
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AMDGPUAliasAnalysis.h
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[AMDGPU] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC).
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2017-08-08 23:53:55 +00:00 |
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AMDGPUAlwaysInlinePass.cpp
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AMDGPU: Add option to stress calls
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2017-09-21 07:00:48 +00:00 |
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AMDGPUAnnotateKernelFeatures.cpp
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[Analysis] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes. Also affected in files (NFC).
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2017-08-31 21:56:16 +00:00 |
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AMDGPUAnnotateUniformValues.cpp
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AMDGPU: Fix converting unanalyzable global loads to SMRD
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2017-07-12 23:06:18 +00:00 |
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AMDGPUArgumentUsageInfo.cpp
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[CodeGen] Rename functions PrintReg* to printReg*
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2017-11-28 12:42:37 +00:00 |
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AMDGPUArgumentUsageInfo.h
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[AMDGPU] Fixed MSVC build break
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2017-08-04 10:53:07 +00:00 |
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AMDGPUAsmPrinter.cpp
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[AMDGPU][MC][GFX8][GFX9] Added XNACK_MASK support
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2018-01-10 14:22:19 +00:00 |
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AMDGPUAsmPrinter.h
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[AMDGPU] add labels to +DumpCode output
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2017-12-08 14:09:34 +00:00 |
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AMDGPUCallLowering.cpp
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MachineFunction: Return reference from getFunction(); NFC
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2017-12-15 22:22:58 +00:00 |
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AMDGPUCallLowering.h
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AMDGPU: Start defining a calling convention
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2017-05-17 21:56:25 +00:00 |
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AMDGPUCallingConv.td
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AMDGPU: Initial implementation of calls
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2017-08-01 19:54:18 +00:00 |
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AMDGPUCodeGenPrepare.cpp
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[IR] redefine 'UnsafeAlgebra' / 'reassoc' fast-math-flags and add 'trans' fast-math-flag
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2017-11-06 16:27:15 +00:00 |
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AMDGPUFrameLowering.cpp
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[AMDGPU] Split R600/SI getFrameIndexReference and emit stack object offsets for SI
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2017-03-10 19:39:07 +00:00 |
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AMDGPUFrameLowering.h
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Move TargetFrameLowering.h to CodeGen where it's implemented
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2017-11-03 22:32:11 +00:00 |
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AMDGPUGenRegisterBankInfo.def
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[GlobalISel] Make GlobalISel a non-optional library.
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2017-08-03 21:52:25 +00:00 |
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AMDGPUISelDAGToDAG.cpp
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[AMDGPU] add LDS f32 intrinsics
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2018-01-17 14:05:05 +00:00 |
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AMDGPUISelLowering.cpp
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AMDGPU/SI: Add d16 support for image intrinsics.
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2018-01-18 22:08:53 +00:00 |
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AMDGPUISelLowering.h
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AMDGPU/SI: Add d16 support for image intrinsics.
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2018-01-18 22:08:53 +00:00 |
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AMDGPUInline.cpp
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[AMDGPU] Port of HSAIL inliner
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2017-09-20 04:25:58 +00:00 |
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AMDGPUInstrInfo.cpp
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AMDGPU/SI: Add d16 support for buffer intrinsics.
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2018-01-12 21:12:19 +00:00 |
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AMDGPUInstrInfo.h
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AMDGPU: Partially fix disassembly of MIMG instructions
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2017-12-13 21:07:51 +00:00 |
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AMDGPUInstrInfo.td
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Implement custom lowering for ISD::CTTZ_ZERO_UNDEF and ISD::CTTZ.
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2017-10-12 19:37:14 +00:00 |
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AMDGPUInstructionSelector.cpp
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[GISel] Make constrainSelectedInstRegOperands() available to the legalizer. NFC
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2018-01-17 19:31:33 +00:00 |
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AMDGPUInstructionSelector.h
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[globalisel][tablegen] Generate rule coverage and use it to identify untested rules
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2017-11-16 00:46:35 +00:00 |
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AMDGPUInstructions.td
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AMDGPU/EG: Add a new FeatureFMA and use it to selectively enable FMA instruction
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2017-12-04 23:07:28 +00:00 |
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AMDGPUIntrinsicInfo.cpp
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Rename AttributeSet to AttributeList
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2017-03-21 16:57:19 +00:00 |
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AMDGPUIntrinsicInfo.h
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…
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AMDGPUIntrinsics.td
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AMDGPU: Remove legacy bfe intrinsics
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2017-04-03 18:08:08 +00:00 |
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AMDGPULegalizerInfo.cpp
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Fix a bunch more layering of CodeGen headers that are in Target
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2017-11-17 01:07:10 +00:00 |
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AMDGPULegalizerInfo.h
|
Re-commit AMDGPU/GlobalISel: Add support for simple shaders
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2017-01-30 21:56:46 +00:00 |
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AMDGPULibCalls.cpp
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Make helpers static. NFC.
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2017-11-24 14:55:41 +00:00 |
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AMDGPULibFunc.cpp
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[AMDGPU] Remove hardcoded address space value from AMDGPULibFunc
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2017-11-04 17:37:43 +00:00 |
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AMDGPULibFunc.h
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[AMDGPU] Remove hardcoded address space value from AMDGPULibFunc
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2017-11-04 17:37:43 +00:00 |
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AMDGPULowerIntrinsics.cpp
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Extend memcpy expansion in Transform/Utils to handle wider operand types.
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2017-07-07 02:00:06 +00:00 |
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AMDGPUMCInstLower.cpp
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MachineFunction: Return reference from getFunction(); NFC
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2017-12-15 22:22:58 +00:00 |
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AMDGPUMCInstLower.h
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…
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AMDGPUMachineCFGStructurizer.cpp
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[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.
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2017-12-07 10:40:31 +00:00 |
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AMDGPUMachineFunction.cpp
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MachineFunction: Return reference from getFunction(); NFC
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2017-12-15 22:22:58 +00:00 |
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AMDGPUMachineFunction.h
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Sort the remaining #include lines in include/... and lib/....
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2017-06-06 11:49:48 +00:00 |
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AMDGPUMachineModuleInfo.cpp
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AMDGPU: Implement memory model
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2017-07-21 21:19:23 +00:00 |
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AMDGPUMachineModuleInfo.h
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AMDGPU: Handle more than one memory operand in SIMemoryLegalizer
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2017-09-07 16:14:21 +00:00 |
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AMDGPUMacroFusion.cpp
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AMDGPU: Add macro fusion schedule DAG mutation
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2017-07-06 20:57:05 +00:00 |
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AMDGPUMacroFusion.h
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AMDGPU: Add macro fusion schedule DAG mutation
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2017-07-06 20:57:05 +00:00 |
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AMDGPUOpenCLEnqueuedBlockLowering.cpp
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AMDGPU: Fix set but not used warnings related to AMDGPUAS
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2017-11-01 19:12:38 +00:00 |
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AMDGPUOpenCLImageTypeLoweringPass.cpp
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[AMDGPU] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC).
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2017-08-08 23:53:55 +00:00 |
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AMDGPUPTNote.h
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AMDGPU/NFC: Move AMDGPU specific note types to ELF.h
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2017-10-12 18:59:54 +00:00 |
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AMDGPUPromoteAlloca.cpp
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AMDGPU: Fix assert on alloca of array of struct
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2017-09-14 18:02:29 +00:00 |
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AMDGPURegAsmNames.inc.cpp
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AMDGPU: Work around build special casing .inc files
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2017-06-08 19:25:21 +00:00 |
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AMDGPURegisterBankInfo.cpp
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Fix a bunch more layering of CodeGen headers that are in Target
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2017-11-17 01:07:10 +00:00 |
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AMDGPURegisterBankInfo.h
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Sort the remaining #include lines in include/... and lib/....
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2017-06-06 11:49:48 +00:00 |
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AMDGPURegisterBanks.td
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Re-commit AMDGPU/GlobalISel: Add support for simple shaders
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2017-01-30 21:56:46 +00:00 |
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AMDGPURegisterInfo.cpp
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[AMDGPU] Make sure all super regs of reserved regs are marked reserved.
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2018-01-24 18:09:53 +00:00 |
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AMDGPURegisterInfo.h
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[AMDGPU] Make sure all super regs of reserved regs are marked reserved.
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2018-01-24 18:09:53 +00:00 |
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AMDGPURegisterInfo.td
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AMDGPU: Move INDIRECT_BASE_ADDR definition out of common files
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2017-07-29 03:44:07 +00:00 |
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AMDGPURewriteOutArguments.cpp
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[AMDGPU] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC).
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2017-08-08 23:53:55 +00:00 |
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AMDGPUSubtarget.cpp
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AMDGPU/SI: Add d16 support for buffer intrinsics.
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2018-01-12 21:12:19 +00:00 |
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AMDGPUSubtarget.h
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AMDGPU/SI: Add d16 support for buffer intrinsics.
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2018-01-12 21:12:19 +00:00 |
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AMDGPUTargetMachine.cpp
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Split MachineLICM into EarlyMachineLICM and MachineLICM; NFC
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2018-01-19 06:46:10 +00:00 |
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AMDGPUTargetMachine.h
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(Re-landing) Expose a TargetMachine::getTargetTransformInfo function
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2017-12-22 18:21:59 +00:00 |
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AMDGPUTargetObjectFile.cpp
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AMDGPU: Fix set but not used warnings related to AMDGPUAS
|
2017-11-01 19:12:38 +00:00 |
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AMDGPUTargetObjectFile.h
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[AMDGPU] Get address space mapping by target triple environment
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2017-03-27 14:04:01 +00:00 |
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AMDGPUTargetTransformInfo.cpp
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[AMDGPU] fix LDS f32 intrinsics
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2018-01-26 11:09:38 +00:00 |
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AMDGPUTargetTransformInfo.h
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LSR: Check more intrinsic pointer operands
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2017-12-11 21:38:43 +00:00 |
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AMDGPUUnifyDivergentExitNodes.cpp
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[Transforms] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
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2017-10-17 21:27:42 +00:00 |
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AMDGPUUnifyMetadata.cpp
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[AMDGPU] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC).
|
2017-08-10 00:46:15 +00:00 |
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AMDILCFGStructurizer.cpp
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MachineFunction: Return reference from getFunction(); NFC
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2017-12-15 22:22:58 +00:00 |
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AMDKernelCodeT.h
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[AMDGPU] Revert r310429 changes in AMDKernelCodeT.h which broke some build bots.
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2017-08-09 00:06:29 +00:00 |
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BUFInstructions.td
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AMDGPU/SI: Fix typos in d16 support patch the buffer intrinsics.
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2018-01-18 22:57:57 +00:00 |
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CMakeLists.txt
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AMDGPU: Partial ILP scheduler port from SelectionDAG to SchedulingDAG (experimental)
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2017-11-20 14:35:53 +00:00 |
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CaymanInstructions.td
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[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.
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2017-12-07 10:40:31 +00:00 |
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DSInstructions.td
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[AMDGPU] add LDS f32 intrinsics
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2018-01-17 14:05:05 +00:00 |
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EvergreenInstructions.td
|
[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.
|
2017-12-07 10:40:31 +00:00 |
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FLATInstructions.td
|
[AMDGPU][MC][DISASSEMBLER][GFX9] Corrected decoding of GLOBAL/SCRATCH opcodes
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2017-11-27 17:14:35 +00:00 |
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GCNHazardRecognizer.cpp
|
[AMDGPU] Add GCNHazardRecognizer::checkInlineAsmHazards() and GCNHazardRecognizer::checkVALUHazardsHelper(). checkInlineAsmHazards() checks INLINEASM for hazards that we particularly care about (so not exhaustive); this patch adds a check for INLINEASM that defs vregs that hold data-to-be stored by immediately preceding store of more than 8 bytes. If the instr were not within an INLINEASM, this scenario would be handled by checkVALUHazard(). Add checkVALUHazardsHelper(), which will be called by both checkVALUHazards() and checkInlineAsmHazards().
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2017-12-07 20:34:25 +00:00 |
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GCNHazardRecognizer.h
|
[AMDGPU] Add GCNHazardRecognizer::checkInlineAsmHazards() and GCNHazardRecognizer::checkVALUHazardsHelper(). checkInlineAsmHazards() checks INLINEASM for hazards that we particularly care about (so not exhaustive); this patch adds a check for INLINEASM that defs vregs that hold data-to-be stored by immediately preceding store of more than 8 bytes. If the instr were not within an INLINEASM, this scenario would be handled by checkVALUHazard(). Add checkVALUHazardsHelper(), which will be called by both checkVALUHazards() and checkInlineAsmHazards().
|
2017-12-07 20:34:25 +00:00 |
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GCNILPSched.cpp
|
AMDGPU: Partial ILP scheduler port from SelectionDAG to SchedulingDAG (experimental)
|
2017-11-20 14:35:53 +00:00 |
|
GCNIterativeScheduler.cpp
|
MachineFunction: Return reference from getFunction(); NFC
|
2017-12-15 22:22:58 +00:00 |
|
GCNIterativeScheduler.h
|
AMDGPU: Partial ILP scheduler port from SelectionDAG to SchedulingDAG (experimental)
|
2017-11-20 14:35:53 +00:00 |
|
GCNMinRegStrategy.cpp
|
[AMDGPU] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC).
|
2017-08-08 23:53:55 +00:00 |
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GCNProcessors.td
|
AMDGPU/GCN: Bring processors in sync with AMDGPUUsage
|
2017-12-08 20:52:28 +00:00 |
|
GCNRegPressure.cpp
|
Rename LiveIntervalAnalysis.h to LiveIntervals.h
|
2017-12-13 02:51:04 +00:00 |
|
GCNRegPressure.h
|
Rename LiveIntervalAnalysis.h to LiveIntervals.h
|
2017-12-13 02:51:04 +00:00 |
|
GCNSchedStrategy.cpp
|
[NFC] fix trivial typos in comments
|
2018-01-22 05:54:46 +00:00 |
|
GCNSchedStrategy.h
|
fix typos in comments and error messges; NFC
|
2017-07-13 06:48:39 +00:00 |
|
LLVMBuild.txt
|
AMDGPU: Add GlobalISel to required_libraries.
|
2017-01-28 18:13:08 +00:00 |
|
MIMGInstructions.td
|
[AMDGPU][MC] Added support of 64-bit image atomics
|
2018-01-26 15:43:29 +00:00 |
|
R600ClauseMergePass.cpp
|
MachineFunction: Return reference from getFunction(); NFC
|
2017-12-15 22:22:58 +00:00 |
|
R600ControlFlowFinalizer.cpp
|
MachineFunction: Return reference from getFunction(); NFC
|
2017-12-15 22:22:58 +00:00 |
|
R600Defines.h
|
…
|
|
|
R600EmitClauseMarkers.cpp
|
Sort the remaining #include lines in include/... and lib/....
|
2017-06-06 11:49:48 +00:00 |
|
R600ExpandSpecialInstrs.cpp
|
[AMDGPU] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC).
|
2017-08-10 00:46:15 +00:00 |
|
R600FrameLowering.cpp
|
Sort the remaining #include lines in include/... and lib/....
|
2017-06-06 11:49:48 +00:00 |
|
R600FrameLowering.h
|
AMDGPU: Initial implementation of calls
|
2017-08-01 19:54:18 +00:00 |
|
R600ISelLowering.cpp
|
AMDGPU/EG: Add a new FeatureFMA and use it to selectively enable FMA instruction
|
2017-12-04 23:07:28 +00:00 |
|
R600ISelLowering.h
|
Add DAG argument to canMergeStoresTo NFC.
|
2017-07-10 20:25:54 +00:00 |
|
R600InstrFormats.td
|
AMDGPU: Remove global isGCN predicates
|
2017-10-03 00:06:41 +00:00 |
|
R600InstrInfo.cpp
|
[AMDGPU] Make sure all super regs of reserved regs are marked reserved.
|
2018-01-24 18:09:53 +00:00 |
|
R600InstrInfo.h
|
[AMDGPU] Make sure all super regs of reserved regs are marked reserved.
|
2018-01-24 18:09:53 +00:00 |
|
R600Instructions.td
|
AMDGPU/EG: Add a new FeatureFMA and use it to selectively enable FMA instruction
|
2017-12-04 23:07:28 +00:00 |
|
R600Intrinsics.td
|
AMDGPU: Make intrinsics speculatable
|
2017-05-02 16:57:44 +00:00 |
|
R600MachineFunctionInfo.cpp
|
…
|
|
|
R600MachineFunctionInfo.h
|
…
|
|
|
R600MachineScheduler.cpp
|
[CodeGen] Rename DEBUG_TYPE to match passnames
|
2017-07-11 22:08:28 +00:00 |
|
R600MachineScheduler.h
|
…
|
|
|
R600OptimizeVectorRegisters.cpp
|
MachineFunction: Return reference from getFunction(); NFC
|
2017-12-15 22:22:58 +00:00 |
|
R600Packetizer.cpp
|
AMDGPU/R600: Initialize more passes
|
2017-08-02 22:19:45 +00:00 |
|
R600Processors.td
|
AMDGPU/EG: Add a new FeatureFMA and use it to selectively enable FMA instruction
|
2017-12-04 23:07:28 +00:00 |
|
R600RegisterInfo.cpp
|
[AMDGPU] Make sure all super regs of reserved regs are marked reserved.
|
2018-01-24 18:09:53 +00:00 |
|
R600RegisterInfo.h
|
AMDGPU: Start defining a calling convention
|
2017-05-17 21:56:25 +00:00 |
|
R600RegisterInfo.td
|
AMDGPU: Move INDIRECT_BASE_ADDR definition out of common files
|
2017-07-29 03:44:07 +00:00 |
|
R600Schedule.td
|
…
|
|
|
R700Instructions.td
|
…
|
|
|
SIAnnotateControlFlow.cpp
|
AMDGPU: Error in SIAnnotateControlFlow instead of assert
|
2018-01-17 16:30:01 +00:00 |
|
SIDebuggerInsertNops.cpp
|
Sort the remaining #include lines in include/... and lib/....
|
2017-06-06 11:49:48 +00:00 |
|
SIDefines.h
|
AMDGPU/SI: Add d16 support for image intrinsics.
|
2018-01-18 22:08:53 +00:00 |
|
SIFixSGPRCopies.cpp
|
[CodeGen] Unify MBB reference format in both MIR and debug output
|
2017-12-04 17:18:51 +00:00 |
|
SIFixVGPRCopies.cpp
|
…
|
|
|
SIFixWWMLiveness.cpp
|
Rename LiveIntervalAnalysis.h to LiveIntervals.h
|
2017-12-13 02:51:04 +00:00 |
|
SIFoldOperands.cpp
|
MachineFunction: Return reference from getFunction(); NFC
|
2017-12-15 22:22:58 +00:00 |
|
SIFrameLowering.cpp
|
MachineFunction: Return reference from getFunction(); NFC
|
2017-12-15 22:22:58 +00:00 |
|
SIFrameLowering.h
|
[AMDGPU] AMDPAL scratch buffer support
|
2017-09-29 09:49:35 +00:00 |
|
SIISelLowering.cpp
|
[AMDGPU] fix LDS f32 intrinsics
|
2018-01-26 11:09:38 +00:00 |
|
SIISelLowering.h
|
AMDGPU/SI: Add d16 support for buffer intrinsics.
|
2018-01-12 21:12:19 +00:00 |
|
SIInsertSkips.cpp
|
MachineFunction: Return reference from getFunction(); NFC
|
2017-12-15 22:22:58 +00:00 |
|
SIInsertWaitcnts.cpp
|
[AMDGPU] Revert "[AMDGPU] Add options for waitcnt pass debugging; add instr count in debug output."
|
2017-12-07 21:14:41 +00:00 |
|
SIInsertWaits.cpp
|
[AMDGPU] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC).
|
2017-08-08 00:47:13 +00:00 |
|
SIInstrFormats.td
|
AMDGPU/SI: Add d16 support for image intrinsics.
|
2018-01-18 22:08:53 +00:00 |
|
SIInstrInfo.cpp
|
MachineFunction: Return reference from getFunction(); NFC
|
2017-12-15 22:22:58 +00:00 |
|
SIInstrInfo.h
|
[NFC] fix trivial typos in comments
|
2018-01-24 05:04:35 +00:00 |
|
SIInstrInfo.td
|
[AMDGPU][MC] Added support of 64-bit image atomics
|
2018-01-26 15:43:29 +00:00 |
|
SIInstructions.td
|
AMDGPU: Use gfx9 carry-less add/sub instructions
|
2017-11-30 22:51:26 +00:00 |
|
SIIntrinsics.td
|
AMDGPU: Remove legacy export intrinsic
|
2017-04-04 16:34:39 +00:00 |
|
SILoadStoreOptimizer.cpp
|
[AMDGPU] SI Load Store Optimizer: When merging with offset, use V_ADD_{I|U}32_e64
|
2018-01-22 21:46:43 +00:00 |
|
SILowerControlFlow.cpp
|
Rename LiveIntervalAnalysis.h to LiveIntervals.h
|
2017-12-13 02:51:04 +00:00 |
|
SILowerI1Copies.cpp
|
Rename LiveIntervalAnalysis.h to LiveIntervals.h
|
2017-12-13 02:51:04 +00:00 |
|
SIMachineFunctionInfo.cpp
|
AMDGPU: Use unique PSVs for buffer resources
|
2017-12-29 17:18:21 +00:00 |
|
SIMachineFunctionInfo.h
|
[AMDGPU] stop image_store being moved illegally
|
2018-01-12 22:57:24 +00:00 |
|
SIMachineScheduler.cpp
|
Rename LiveIntervalAnalysis.h to LiveIntervals.h
|
2017-12-13 02:51:04 +00:00 |
|
SIMachineScheduler.h
|
AMDGPU/SI: Force exports at the end for SI scheduler
|
2017-07-25 20:36:58 +00:00 |
|
SIMemoryLegalizer.cpp
|
MachineFunction: Return reference from getFunction(); NFC
|
2017-12-15 22:22:58 +00:00 |
|
SIOptimizeExecMasking.cpp
|
MachineFunction: Return reference from getFunction(); NFC
|
2017-12-15 22:22:58 +00:00 |
|
SIOptimizeExecMaskingPreRA.cpp
|
MachineFunction: Return reference from getFunction(); NFC
|
2017-12-15 22:22:58 +00:00 |
|
SIPeepholeSDWA.cpp
|
MachineFunction: Return reference from getFunction(); NFC
|
2017-12-15 22:22:58 +00:00 |
|
SIRegisterInfo.cpp
|
[AMDGPU] Make sure all super regs of reserved regs are marked reserved.
|
2018-01-24 18:09:53 +00:00 |
|
SIRegisterInfo.h
|
[AMDGPU] Make sure all super regs of reserved regs are marked reserved.
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2018-01-24 18:09:53 +00:00 |
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SIRegisterInfo.td
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[AMDGPU][MC][GFX8][GFX9] Added XNACK_MASK support
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2018-01-10 14:22:19 +00:00 |
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SISchedule.td
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AMDGPU: Implement early ifcvt target hooks.
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2017-01-25 04:25:02 +00:00 |
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SIShrinkInstructions.cpp
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MachineFunction: Return reference from getFunction(); NFC
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2017-12-15 22:22:58 +00:00 |
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SIWholeQuadMode.cpp
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MachineFunction: Return reference from getFunction(); NFC
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2017-12-15 22:22:58 +00:00 |
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SMInstructions.td
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AMDGPU: Set IntrReadMem on memtime intrinsics
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2017-12-08 20:01:02 +00:00 |
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SOPInstructions.td
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AMDGPU: Add llvm.amdgcn.wqm.vote intrinsic
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2017-10-24 10:26:59 +00:00 |
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VIInstrFormats.td
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…
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VIInstructions.td
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…
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VOP1Instructions.td
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[AMDGPU] Copy impdefs from pseudo to real instructions
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2018-01-15 17:55:35 +00:00 |
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VOP2Instructions.td
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[AMDGPU] Copy impdefs from pseudo to real instructions
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2018-01-15 17:55:35 +00:00 |
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VOP3Instructions.td
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[AMDGPU][MC][GFX9] Added v_interp_p2_f16 and v_interp_p2_legacy_f16
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2017-11-24 15:37:14 +00:00 |
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VOP3PInstructions.td
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AMDGPU: Add max-mix-insts subtarget feature
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2017-10-25 07:00:51 +00:00 |
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VOPCInstructions.td
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[AMDGPU] Copy impdefs from pseudo to real instructions
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2018-01-15 17:55:35 +00:00 |
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VOPInstructions.td
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[AMDGPU] Copy impdefs from pseudo to real instructions
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2018-01-15 17:55:35 +00:00 |
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