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llvm-project/llvm/lib/Target/AArch64
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QingShan Zhang 2133d3c558 [DAGCombine] Initialize the default operation action for SIGN_EXTEND_INREG for vector type as 'expand' instead of 'legal' 
For now, we didn't set the default operation action for SIGN_EXTEND_INREG for
vector type, which is 0 by default, that is legal. However, most target didn't
have native instructions to support this opcode. It should be set as expand by
default, as what we did for ANY_EXTEND_VECTOR_INREG.

Differential Revision: https://reviews.llvm.org/D70000
 		2020-01-03 03:26:41 +00:00
..
AsmParser [cmake] Explicitly mark libraries defined in lib/ as "Component Libraries" 2019-11-21 10:48:08 -08:00
Disassembler [cmake] Explicitly mark libraries defined in lib/ as "Component Libraries" 2019-11-21 10:48:08 -08:00
MCTargetDesc [AArch64] Fix a bug with jump table generation 2019-12-06 14:31:53 +00:00
TargetInfo [cmake] Explicitly mark libraries defined in lib/ as "Component Libraries" 2019-11-21 10:48:08 -08:00
Utils [AArch64][SVE] Integer reduction instructions pattern/intrinsics. 2019-12-05 09:59:19 -05:00
AArch64.h GlobalISel: add combiner to form indexed loads. 2019-09-09 10:04:23 +00:00
AArch64.td [AArch64] Add the pipeline model for Exynos M5 2019-11-22 15:09:17 -06:00
AArch64A53Fix835769.cpp
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AArch64A57FPLoadBalancing.cpp [llvm] Migrate llvm::make_unique to std::make_unique 2019-08-15 15:54:37 +00:00
AArch64AdvSIMDScalarPass.cpp [aarch64] Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM 2019-08-12 22:40:53 +00:00
AArch64AsmPrinter.cpp [StackMaps] Be explicit about label formation [NFC] (try 2) 2019-12-19 14:05:30 -08:00
AArch64BranchTargets.cpp
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AArch64CallLowering.cpp When lowering calls and tail calls in AArch64, the register mask and 2019-11-06 15:25:10 -08:00
AArch64CallLowering.h [AArch64][GlobalISel][NFC] Refactor tail call lowering code 2019-09-17 19:08:44 +00:00
AArch64CallingConvention.cpp [Alignment][NFC] Remove unneeded llvm:: scoping on Align types 2019-09-27 12:54:21 +00:00
AArch64CallingConvention.h Add Windows Control Flow Guard checks (/guard:cf). 2019-10-28 15:19:39 +00:00
AArch64CallingConvention.td [AArch64][SVE] Remove nxv1f32 and nxv1f64 as legal types 2019-12-12 09:49:22 +00:00
AArch64CleanupLocalDynamicTLSPass.cpp
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AArch64CollectLOH.cpp AArch64: support arm64_32, an ILP32 slice for watchOS. 2019-09-12 10:22:23 +00:00
AArch64Combine.td [gicombiner] Add the run-time rule disable option 2019-10-17 00:37:04 +00:00
AArch64CompressJumpTables.cpp [AArch64] Fix a bug with jump table generation 2019-12-06 14:31:53 +00:00
AArch64CondBrTuning.cpp [aarch64] Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM 2019-08-12 22:40:53 +00:00
AArch64ConditionOptimizer.cpp Sink all InitializePasses.h includes 2019-11-13 16:34:37 -08:00
AArch64ConditionalCompares.cpp [MIBundles] Move analyzePhysReg out of MIBundleOperands iterator (NFC). 2019-12-02 20:47:08 +00:00
AArch64DeadRegisterDefinitionsPass.cpp [aarch64] Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM 2019-08-12 22:40:53 +00:00
AArch64ExpandImm.cpp [AArch64] Prefer "mov" over "orr" to materialize constants. 2019-03-25 21:25:28 +00:00
AArch64ExpandImm.h
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AArch64ExpandPseudoInsts.cpp [AArch64ExpandPseudos] Preserve renamable state when expanding MOVi64 & co. 2019-11-12 11:29:04 +00:00
AArch64FalkorHWPFFix.cpp Sink all InitializePasses.h includes 2019-11-13 16:34:37 -08:00
AArch64FastISel.cpp [AArch64] [Windows] Use COFF stubs for calls to extern_weak functions 2019-12-23 12:13:49 +02:00
AArch64FrameLowering.cpp Revert "AArch64: Fix frame record chain" 2019-12-14 13:58:40 -08:00
AArch64FrameLowering.h [AArch64] Fix issues with large arrays on stack 2019-12-10 11:44:41 +00:00
AArch64GenRegisterBankInfo.def [AArch64][GlobalISel] Overhaul legalization & isel or shifts to select immediate forms. 2019-07-03 01:49:06 +00:00
AArch64ISelDAGToDAG.cpp [SelectionDAG] Disallow indirect "i" constraint 2019-12-29 16:50:42 -08:00
AArch64ISelLowering.cpp [DAGCombine] Initialize the default operation action for SIGN_EXTEND_INREG for vector type as 'expand' instead of 'legal' 2020-01-03 03:26:41 +00:00
AArch64ISelLowering.h Recommit "[AArch64][SVE] Add permutation and selection intrinsics" 2019-12-20 10:45:17 +00:00
AArch64InstrAtomics.td DAG: Use TargetConstant for FENCE operands 2020-01-02 17:16:10 -05:00
AArch64InstrFormats.td [AArch64][SVE] Add intrinsics for binary narrowing operations 2019-12-20 10:20:30 +00:00
AArch64InstrInfo.cpp [AArch64] Enable clustering memory accesses to fixed stack objects 2019-12-18 09:46:11 +00:00
AArch64InstrInfo.h [AArch64] Enable clustering memory accesses to fixed stack objects 2019-12-18 09:46:11 +00:00
AArch64InstrInfo.td Recommit "[AArch64][SVE] Add permutation and selection intrinsics" 2019-12-20 10:45:17 +00:00
AArch64InstructionSelector.cpp [IR] Split out target specific intrinsic enums into separate headers 2019-12-11 18:02:14 -08:00
AArch64LegalizerInfo.cpp [AArch64][GlobalISel]: Fix a crash in GlobalIsel in dealing with 16bit uadd.with.overflow. 2019-12-17 16:05:00 -08:00
AArch64LegalizerInfo.h [GlobalISel] Translate calls to memcpy et al to G_INTRINSIC_W_SIDE_EFFECTs and legalize later. 2019-07-19 00:24:45 +00:00
AArch64LoadStoreOptimizer.cpp [AArch64] Respect reserved registers while renaming in LdSt opt. 2019-12-21 15:10:07 +01:00
AArch64MCInstLower.cpp AArch64: Add a tagged-globals backend feature. 2019-07-31 20:14:19 +00:00
AArch64MCInstLower.h
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AArch64MachineFunctionInfo.h Revert "AArch64: Fix frame record chain" 2019-12-14 13:58:40 -08:00
AArch64MacroFusion.cpp
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AArch64MacroFusion.h
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AArch64PBQPRegAlloc.cpp [aarch64] Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM 2019-08-12 22:40:53 +00:00
AArch64PBQPRegAlloc.h
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AArch64PerfectShuffle.h
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AArch64PfmCounters.td
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AArch64PreLegalizerCombiner.cpp [gicombiner] Import tryCombineIndexedLoadStore() 2019-12-18 14:41:38 +00:00
AArch64PromoteConstant.cpp Sink all InitializePasses.h includes 2019-11-13 16:34:37 -08:00
AArch64RedundantCopyElimination.cpp CodeGen: Introduce a class for registers 2019-06-24 15:50:29 +00:00
AArch64RegisterBankInfo.cpp [globalisel] Rename G_GEP to G_PTR_ADD 2019-11-05 10:31:17 -08:00
AArch64RegisterBankInfo.h [AArch64][GlobalISel] Overhaul legalization & isel or shifts to select immediate forms. 2019-07-03 01:49:06 +00:00
AArch64RegisterBanks.td
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AArch64RegisterInfo.cpp [AArch64] Fix issues with large arrays on stack 2019-12-10 11:44:41 +00:00
AArch64RegisterInfo.h CodeGen: Introduce a class for registers 2019-06-24 15:50:29 +00:00
AArch64RegisterInfo.td [AArch64][SVE] Remove nxv1f32 and nxv1f64 as legal types 2019-12-12 09:49:22 +00:00
AArch64SIMDInstrOpt.cpp [aarch64] Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM 2019-08-12 22:40:53 +00:00
AArch64SVEInstrInfo.td [AArch64][SVE] Replace integer immediate intrinsics with splat vector variant 2019-12-20 13:52:19 -05:00
AArch64SchedA53.td [AArch64][SVE2] Add SVE2 target features to backend and TargetParser 2019-05-13 10:10:24 +00:00
AArch64SchedA57.td [AArch64][SVE2] Add SVE2 target features to backend and TargetParser 2019-05-13 10:10:24 +00:00
AArch64SchedA57WriteRes.td
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AArch64SchedCyclone.td [AArch64][SVE2] Add SVE2 target features to backend and TargetParser 2019-05-13 10:10:24 +00:00
AArch64SchedExynosM3.td [AArch64] Update for Exynos 2019-11-12 14:37:41 -06:00
AArch64SchedExynosM4.td [AArch64] Update for Exynos 2019-11-12 14:37:41 -06:00
AArch64SchedExynosM5.td [AArch64] Add the pipeline model for Exynos M5 2019-11-22 15:09:17 -06:00
AArch64SchedFalkor.td [AArch64][SVE2] Add SVE2 target features to backend and TargetParser 2019-05-13 10:10:24 +00:00
AArch64SchedFalkorDetails.td
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AArch64SchedKryo.td [AArch64][SVE2] Add SVE2 target features to backend and TargetParser 2019-05-13 10:10:24 +00:00
AArch64SchedKryoDetails.td
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AArch64SchedPredExynos.td [AArch64] Add new scheduling predicates 2019-11-11 15:02:51 -06:00
AArch64SchedPredicates.td [NFC] [AArch64] Fix wrong documentation for IsStoreRegOffsetOp 2019-11-23 19:11:31 +01:00
AArch64SchedThunderX.td [AArch64][SVE2] Add SVE2 target features to backend and TargetParser 2019-05-13 10:10:24 +00:00
AArch64SchedThunderX2T99.td [AArch64] Remove overlapping scheduling definitions (NFC) 2019-10-30 13:57:27 -05:00
AArch64Schedule.td
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AArch64SelectionDAGInfo.cpp AArch64: support arm64_32, an ILP32 slice for watchOS. 2019-09-12 10:22:23 +00:00
AArch64SelectionDAGInfo.h Basic codegen for MTE stack tagging. 2019-07-17 19:24:02 +00:00
AArch64SpeculationHardening.cpp Prune a LegacyDivergenceAnalysis and MachineLoopInfo include each 2019-10-19 01:31:09 +00:00
AArch64StackOffset.h [SVE][CodeGen] Scalable vector MVT size queries 2019-11-18 12:30:59 +00:00
AArch64StackTagging.cpp [IR] Split out target specific intrinsic enums into separate headers 2019-12-11 18:02:14 -08:00
AArch64StackTaggingPreRA.cpp MTE: add more unchecked instructions. 2019-11-19 11:19:53 -08:00
AArch64StorePairSuppress.cpp [aarch64] Apply llvm-prefer-register-over-unsigned from clang-tidy to LLVM 2019-08-12 22:40:53 +00:00
AArch64Subtarget.cpp [AArch64] [Windows] Use COFF stubs for calls to extern_weak functions 2019-12-23 12:13:49 +02:00
AArch64Subtarget.h [RAGreedy] Enable -consider-local-interval-cost for AArch64 2019-11-08 10:20:28 +00:00
AArch64SystemOperands.td [AArch64] Adding support for PMMIR_EL1 register 2019-10-18 12:40:29 +00:00
AArch64TargetMachine.cpp [NFC][AArch64] Fix typo. 2019-12-13 10:25:36 +08:00
AArch64TargetMachine.h
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AArch64TargetObjectFile.cpp Revert "Honor -fuse-init-array when os is not specified on x86" 2019-12-17 07:36:59 -08:00
AArch64TargetObjectFile.h [MachO][TLOF] Use hasLocalLinkage to determine if indirect symbol is local 2019-08-22 16:59:00 +00:00
AArch64TargetTransformInfo.cpp [IR] Split out target specific intrinsic enums into separate headers 2019-12-11 18:02:14 -08:00
AArch64TargetTransformInfo.h Rename TTI::getIntImmCost for instructions and intrinsics 2019-12-11 18:00:20 -08:00
CMakeLists.txt [gicombiner] Fix windows issue where single quotes in the command are passed through to tablegen 2019-10-02 23:38:06 +00:00
LLVMBuild.txt Add Windows Control Flow Guard checks (/guard:cf). 2019-10-28 15:19:39 +00:00
SVEInstrFormats.td [AArch64][SVE] Replace integer immediate intrinsics with splat vector variant 2019-12-20 13:52:19 -05:00