forked from OSchip/llvm-project
79 lines
3.2 KiB
LLVM
79 lines
3.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=-avx,+sse -show-mc-encoding | FileCheck %s --check-prefix=SSE
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; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx2 -show-mc-encoding | FileCheck %s --check-prefix=VCHECK --check-prefix=AVX2
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; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=skx -show-mc-encoding | FileCheck %s --check-prefix=VCHECK --check-prefix=SKX
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define i64 @test_x86_sse_cvtss2si64(<4 x float> %a0) {
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; CHECK-LABEL: test_x86_sse_cvtss2si64:
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; CHECK: ## BB#0:
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; CHECK-NEXT: vcvtss2si %xmm0, %rax
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; CHECK-NEXT: retq
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; SSE-LABEL: test_x86_sse_cvtss2si64:
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; SSE: ## BB#0:
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; SSE-NEXT: cvtss2si %xmm0, %rax ## encoding: [0xf3,0x48,0x0f,0x2d,0xc0]
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; SSE-NEXT: retq ## encoding: [0xc3]
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;
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; AVX2-LABEL: test_x86_sse_cvtss2si64:
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; AVX2: ## BB#0:
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; AVX2-NEXT: vcvtss2si %xmm0, %rax ## encoding: [0xc4,0xe1,0xfa,0x2d,0xc0]
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; AVX2-NEXT: retq ## encoding: [0xc3]
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;
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; SKX-LABEL: test_x86_sse_cvtss2si64:
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; SKX: ## BB#0:
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; SKX-NEXT: vcvtss2si %xmm0, %rax ## EVEX TO VEX Compression encoding: [0xc4,0xe1,0xfa,0x2d,0xc0]
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; SKX-NEXT: retq ## encoding: [0xc3]
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%res = call i64 @llvm.x86.sse.cvtss2si64(<4 x float> %a0) ; <i64> [#uses=1]
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ret i64 %res
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}
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declare i64 @llvm.x86.sse.cvtss2si64(<4 x float>) nounwind readnone
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define <4 x float> @test_x86_sse_cvtsi642ss(<4 x float> %a0, i64 %a1) {
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; CHECK-LABEL: test_x86_sse_cvtsi642ss:
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; CHECK: ## BB#0:
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; CHECK-NEXT: vcvtsi2ssq %rdi, %xmm0, %xmm0
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; CHECK-NEXT: retq
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; SSE-LABEL: test_x86_sse_cvtsi642ss:
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; SSE: ## BB#0:
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; SSE-NEXT: cvtsi2ssq %rdi, %xmm0 ## encoding: [0xf3,0x48,0x0f,0x2a,0xc7]
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; SSE-NEXT: retq ## encoding: [0xc3]
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;
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; AVX2-LABEL: test_x86_sse_cvtsi642ss:
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; AVX2: ## BB#0:
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; AVX2-NEXT: vcvtsi2ssq %rdi, %xmm0, %xmm0 ## encoding: [0xc4,0xe1,0xfa,0x2a,0xc7]
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; AVX2-NEXT: retq ## encoding: [0xc3]
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;
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; SKX-LABEL: test_x86_sse_cvtsi642ss:
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; SKX: ## BB#0:
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; SKX-NEXT: vcvtsi2ssq %rdi, %xmm0, %xmm0 ## encoding: [0x62,0xf1,0xfe,0x08,0x2a,0xc7]
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; SKX-NEXT: retq ## encoding: [0xc3]
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%res = call <4 x float> @llvm.x86.sse.cvtsi642ss(<4 x float> %a0, i64 %a1) ; <<4 x float>> [#uses=1]
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ret <4 x float> %res
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}
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declare <4 x float> @llvm.x86.sse.cvtsi642ss(<4 x float>, i64) nounwind readnone
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define i64 @test_x86_sse_cvttss2si64(<4 x float> %a0) {
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; CHECK-LABEL: test_x86_sse_cvttss2si64:
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; CHECK: ## BB#0:
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; CHECK-NEXT: vcvttss2si %xmm0, %rax
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; CHECK-NEXT: retq
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; SSE-LABEL: test_x86_sse_cvttss2si64:
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; SSE: ## BB#0:
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; SSE-NEXT: cvttss2si %xmm0, %rax ## encoding: [0xf3,0x48,0x0f,0x2c,0xc0]
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; SSE-NEXT: retq ## encoding: [0xc3]
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;
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; AVX2-LABEL: test_x86_sse_cvttss2si64:
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; AVX2: ## BB#0:
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; AVX2-NEXT: vcvttss2si %xmm0, %rax ## encoding: [0xc4,0xe1,0xfa,0x2c,0xc0]
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; AVX2-NEXT: retq ## encoding: [0xc3]
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;
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; SKX-LABEL: test_x86_sse_cvttss2si64:
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; SKX: ## BB#0:
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; SKX-NEXT: vcvttss2si %xmm0, %rax ## EVEX TO VEX Compression encoding: [0xc4,0xe1,0xfa,0x2c,0xc0]
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; SKX-NEXT: retq ## encoding: [0xc3]
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%res = call i64 @llvm.x86.sse.cvttss2si64(<4 x float> %a0) ; <i64> [#uses=1]
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ret i64 %res
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}
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declare i64 @llvm.x86.sse.cvttss2si64(<4 x float>) nounwind readnone
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