forked from OSchip/llvm-project
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ReStructuredText
554 lines
20 KiB
ReStructuredText
===========================================
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Control Flow Integrity Design Documentation
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===========================================
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This page documents the design of the :doc:`ControlFlowIntegrity` schemes
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supported by Clang.
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Forward-Edge CFI for Virtual Calls
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==================================
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This scheme works by allocating, for each static type used to make a virtual
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call, a region of read-only storage in the object file holding a bit vector
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that maps onto to the region of storage used for those virtual tables. Each
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set bit in the bit vector corresponds to the `address point`_ for a virtual
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table compatible with the static type for which the bit vector is being built.
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For example, consider the following three C++ classes:
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.. code-block:: c++
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struct A {
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virtual void f1();
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virtual void f2();
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virtual void f3();
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};
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struct B : A {
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virtual void f1();
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virtual void f2();
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virtual void f3();
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};
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struct C : A {
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virtual void f1();
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virtual void f2();
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virtual void f3();
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};
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The scheme will cause the virtual tables for A, B and C to be laid out
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consecutively:
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.. csv-table:: Virtual Table Layout for A, B, C
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:header: 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
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A::offset-to-top, &A::rtti, &A::f1, &A::f2, &A::f3, B::offset-to-top, &B::rtti, &B::f1, &B::f2, &B::f3, C::offset-to-top, &C::rtti, &C::f1, &C::f2, &C::f3
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The bit vector for static types A, B and C will look like this:
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.. csv-table:: Bit Vectors for A, B, C
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:header: Class, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
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A, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0
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B, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0
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C, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0
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Bit vectors are represented in the object file as byte arrays. By loading
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from indexed offsets into the byte array and applying a mask, a program can
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test bits from the bit set with a relatively short instruction sequence. Bit
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vectors may overlap so long as they use different bits. For the full details,
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see the `ByteArrayBuilder`_ class.
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In this case, assuming A is laid out at offset 0 in bit 0, B at offset 0 in
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bit 1 and C at offset 0 in bit 2, the byte array would look like this:
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.. code-block:: c++
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char bits[] = { 0, 0, 1, 0, 0, 0, 3, 0, 0, 0, 0, 5, 0, 0 };
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To emit a virtual call, the compiler will assemble code that checks that
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the object's virtual table pointer is in-bounds and aligned and that the
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relevant bit is set in the bit vector.
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For example on x86 a typical virtual call may look like this:
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.. code-block:: none
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ca7fbb: 48 8b 0f mov (%rdi),%rcx
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ca7fbe: 48 8d 15 c3 42 fb 07 lea 0x7fb42c3(%rip),%rdx
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ca7fc5: 48 89 c8 mov %rcx,%rax
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ca7fc8: 48 29 d0 sub %rdx,%rax
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ca7fcb: 48 c1 c0 3d rol $0x3d,%rax
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ca7fcf: 48 3d 7f 01 00 00 cmp $0x17f,%rax
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ca7fd5: 0f 87 36 05 00 00 ja ca8511
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ca7fdb: 48 8d 15 c0 0b f7 06 lea 0x6f70bc0(%rip),%rdx
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ca7fe2: f6 04 10 10 testb $0x10,(%rax,%rdx,1)
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ca7fe6: 0f 84 25 05 00 00 je ca8511
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ca7fec: ff 91 98 00 00 00 callq *0x98(%rcx)
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[...]
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ca8511: 0f 0b ud2
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The compiler relies on co-operation from the linker in order to assemble
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the bit vectors for the whole program. It currently does this using LLVM's
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`type metadata`_ mechanism together with link-time optimization.
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.. _address point: https://mentorembedded.github.io/cxx-abi/abi.html#vtable-general
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.. _type metadata: http://llvm.org/docs/TypeMetadata.html
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.. _ByteArrayBuilder: http://llvm.org/docs/doxygen/html/structllvm_1_1ByteArrayBuilder.html
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Optimizations
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-------------
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The scheme as described above is the fully general variant of the scheme.
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Most of the time we are able to apply one or more of the following
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optimizations to improve binary size or performance.
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In fact, if you try the above example with the current version of the
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compiler, you will probably find that it will not use the described virtual
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table layout or machine instructions. Some of the optimizations we are about
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to introduce cause the compiler to use a different layout or a different
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sequence of machine instructions.
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Stripping Leading/Trailing Zeros in Bit Vectors
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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If a bit vector contains leading or trailing zeros, we can strip them from
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the vector. The compiler will emit code to check if the pointer is in range
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of the region covered by ones, and perform the bit vector check using a
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truncated version of the bit vector. For example, the bit vectors for our
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example class hierarchy will be emitted like this:
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.. csv-table:: Bit Vectors for A, B, C
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:header: Class, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
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A, , , 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 1, ,
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B, , , , , , , , 1, , , , , , ,
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C, , , , , , , , , , , , , 1, ,
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Short Inline Bit Vectors
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~~~~~~~~~~~~~~~~~~~~~~~~
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If the vector is sufficiently short, we can represent it as an inline constant
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on x86. This saves us a few instructions when reading the correct element
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of the bit vector.
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If the bit vector fits in 32 bits, the code looks like this:
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.. code-block:: none
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dc2: 48 8b 03 mov (%rbx),%rax
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dc5: 48 8d 15 14 1e 00 00 lea 0x1e14(%rip),%rdx
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dcc: 48 89 c1 mov %rax,%rcx
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dcf: 48 29 d1 sub %rdx,%rcx
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dd2: 48 c1 c1 3d rol $0x3d,%rcx
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dd6: 48 83 f9 03 cmp $0x3,%rcx
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dda: 77 2f ja e0b <main+0x9b>
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ddc: ba 09 00 00 00 mov $0x9,%edx
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de1: 0f a3 ca bt %ecx,%edx
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de4: 73 25 jae e0b <main+0x9b>
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de6: 48 89 df mov %rbx,%rdi
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de9: ff 10 callq *(%rax)
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[...]
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e0b: 0f 0b ud2
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Or if the bit vector fits in 64 bits:
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.. code-block:: none
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11a6: 48 8b 03 mov (%rbx),%rax
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11a9: 48 8d 15 d0 28 00 00 lea 0x28d0(%rip),%rdx
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11b0: 48 89 c1 mov %rax,%rcx
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11b3: 48 29 d1 sub %rdx,%rcx
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11b6: 48 c1 c1 3d rol $0x3d,%rcx
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11ba: 48 83 f9 2a cmp $0x2a,%rcx
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11be: 77 35 ja 11f5 <main+0xb5>
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11c0: 48 ba 09 00 00 00 00 movabs $0x40000000009,%rdx
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11c7: 04 00 00
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11ca: 48 0f a3 ca bt %rcx,%rdx
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11ce: 73 25 jae 11f5 <main+0xb5>
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11d0: 48 89 df mov %rbx,%rdi
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11d3: ff 10 callq *(%rax)
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[...]
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11f5: 0f 0b ud2
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If the bit vector consists of a single bit, there is only one possible
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virtual table, and the check can consist of a single equality comparison:
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.. code-block:: none
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9a2: 48 8b 03 mov (%rbx),%rax
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9a5: 48 8d 0d a4 13 00 00 lea 0x13a4(%rip),%rcx
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9ac: 48 39 c8 cmp %rcx,%rax
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9af: 75 25 jne 9d6 <main+0x86>
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9b1: 48 89 df mov %rbx,%rdi
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9b4: ff 10 callq *(%rax)
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[...]
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9d6: 0f 0b ud2
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Virtual Table Layout
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~~~~~~~~~~~~~~~~~~~~
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The compiler lays out classes of disjoint hierarchies in separate regions
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of the object file. At worst, bit vectors in disjoint hierarchies only
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need to cover their disjoint hierarchy. But the closer that classes in
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sub-hierarchies are laid out to each other, the smaller the bit vectors for
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those sub-hierarchies need to be (see "Stripping Leading/Trailing Zeros in Bit
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Vectors" above). The `GlobalLayoutBuilder`_ class is responsible for laying
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out the globals efficiently to minimize the sizes of the underlying bitsets.
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.. _GlobalLayoutBuilder: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Transforms/IPO/LowerTypeTests.h?view=markup
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Alignment
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~~~~~~~~~
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If all gaps between address points in a particular bit vector are multiples
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of powers of 2, the compiler can compress the bit vector by strengthening
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the alignment requirements of the virtual table pointer. For example, given
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this class hierarchy:
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.. code-block:: c++
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struct A {
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virtual void f1();
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virtual void f2();
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};
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struct B : A {
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virtual void f1();
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virtual void f2();
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virtual void f3();
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virtual void f4();
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virtual void f5();
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virtual void f6();
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};
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struct C : A {
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virtual void f1();
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virtual void f2();
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};
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The virtual tables will be laid out like this:
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.. csv-table:: Virtual Table Layout for A, B, C
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:header: 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
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A::offset-to-top, &A::rtti, &A::f1, &A::f2, B::offset-to-top, &B::rtti, &B::f1, &B::f2, &B::f3, &B::f4, &B::f5, &B::f6, C::offset-to-top, &C::rtti, &C::f1, &C::f2
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Notice that each address point for A is separated by 4 words. This lets us
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emit a compressed bit vector for A that looks like this:
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.. csv-table::
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:header: 2, 6, 10, 14
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1, 1, 0, 1
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At call sites, the compiler will strengthen the alignment requirements by
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using a different rotate count. For example, on a 64-bit machine where the
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address points are 4-word aligned (as in A from our example), the ``rol``
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instruction may look like this:
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.. code-block:: none
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dd2: 48 c1 c1 3b rol $0x3b,%rcx
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Padding to Powers of 2
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~~~~~~~~~~~~~~~~~~~~~~
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Of course, this alignment scheme works best if the address points are
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in fact aligned correctly. To make this more likely to happen, we insert
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padding between virtual tables that in many cases aligns address points to
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a power of 2. Specifically, our padding aligns virtual tables to the next
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highest power of 2 bytes; because address points for specific base classes
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normally appear at fixed offsets within the virtual table, this normally
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has the effect of aligning the address points as well.
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This scheme introduces tradeoffs between decreased space overhead for
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instructions and bit vectors and increased overhead in the form of padding. We
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therefore limit the amount of padding so that we align to no more than 128
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bytes. This number was found experimentally to provide a good tradeoff.
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Eliminating Bit Vector Checks for All-Ones Bit Vectors
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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If the bit vector is all ones, the bit vector check is redundant; we simply
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need to check that the address is in range and well aligned. This is more
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likely to occur if the virtual tables are padded.
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Forward-Edge CFI for Indirect Function Calls
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============================================
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Under forward-edge CFI for indirect function calls, each unique function
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type has its own bit vector, and at each call site we need to check that the
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function pointer is a member of the function type's bit vector. This scheme
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works in a similar way to forward-edge CFI for virtual calls, the distinction
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being that we need to build bit vectors of function entry points rather than
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of virtual tables.
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Unlike when re-arranging global variables, we cannot re-arrange functions
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in a particular order and base our calculations on the layout of the
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functions' entry points, as we have no idea how large a particular function
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will end up being (the function sizes could even depend on how we arrange
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the functions). Instead, we build a jump table, which is a block of code
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consisting of one branch instruction for each of the functions in the bit
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set that branches to the target function, and redirect any taken function
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addresses to the corresponding jump table entry. In this way, the distance
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between function entry points is predictable and controllable. In the object
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file's symbol table, the symbols for the target functions also refer to the
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jump table entries, so that addresses taken outside the module will pass
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any verification done inside the module.
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In more concrete terms, suppose we have three functions ``f``, ``g``,
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``h`` which are all of the same type, and a function foo that returns their
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addresses:
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.. code-block:: none
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f:
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mov 0, %eax
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ret
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g:
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mov 1, %eax
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ret
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h:
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mov 2, %eax
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ret
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foo:
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mov f, %eax
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mov g, %edx
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mov h, %ecx
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ret
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Our jump table will (conceptually) look like this:
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.. code-block:: none
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f:
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jmp .Ltmp0 ; 5 bytes
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int3 ; 1 byte
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int3 ; 1 byte
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int3 ; 1 byte
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g:
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jmp .Ltmp1 ; 5 bytes
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int3 ; 1 byte
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int3 ; 1 byte
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int3 ; 1 byte
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h:
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jmp .Ltmp2 ; 5 bytes
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int3 ; 1 byte
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int3 ; 1 byte
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int3 ; 1 byte
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.Ltmp0:
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mov 0, %eax
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ret
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.Ltmp1:
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mov 1, %eax
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ret
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.Ltmp2:
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mov 2, %eax
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ret
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foo:
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mov f, %eax
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mov g, %edx
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mov h, %ecx
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ret
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Because the addresses of ``f``, ``g``, ``h`` are evenly spaced at a power of
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2, and function types do not overlap (unlike class types with base classes),
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we can normally apply the `Alignment`_ and `Eliminating Bit Vector Checks
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for All-Ones Bit Vectors`_ optimizations thus simplifying the check at each
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call site to a range and alignment check.
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Shared library support
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======================
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**EXPERIMENTAL**
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The basic CFI mode described above assumes that the application is a
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monolithic binary; at least that all possible virtual/indirect call
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targets and the entire class hierarchy are known at link time. The
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cross-DSO mode, enabled with **-f[no-]sanitize-cfi-cross-dso** relaxes
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this requirement by allowing virtual and indirect calls to cross the
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DSO boundary.
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Assuming the following setup: the binary consists of several
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instrumented and several uninstrumented DSOs. Some of them may be
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dlopen-ed/dlclose-d periodically, even frequently.
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- Calls made from uninstrumented DSOs are not checked and just work.
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- Calls inside any instrumented DSO are fully protected.
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- Calls between different instrumented DSOs are also protected, with
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a performance penalty (in addition to the monolithic CFI
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overhead).
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- Calls from an instrumented DSO to an uninstrumented one are
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unchecked and just work, with performance penalty.
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- Calls from an instrumented DSO outside of any known DSO are
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detected as CFI violations.
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In the monolithic scheme a call site is instrumented as
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.. code-block:: none
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if (!InlinedFastCheck(f))
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abort();
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call *f
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In the cross-DSO scheme it becomes
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.. code-block:: none
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if (!InlinedFastCheck(f))
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__cfi_slowpath(CallSiteTypeId, f);
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call *f
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CallSiteTypeId
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--------------
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``CallSiteTypeId`` is a stable process-wide identifier of the
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call-site type. For a virtual call site, the type in question is the class
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type; for an indirect function call it is the function signature. The
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mapping from a type to an identifier is an ABI detail. In the current,
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experimental, implementation the identifier of type T is calculated as
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follows:
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- Obtain the mangled name for "typeinfo name for T".
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- Calculate MD5 hash of the name as a string.
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- Reinterpret the first 8 bytes of the hash as a little-endian
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64-bit integer.
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It is possible, but unlikely, that collisions in the
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``CallSiteTypeId`` hashing will result in weaker CFI checks that would
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still be conservatively correct.
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CFI_Check
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---------
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In the general case, only the target DSO knows whether the call to
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function ``f`` with type ``CallSiteTypeId`` is valid or not. To
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export this information, every DSO implements
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.. code-block:: none
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void __cfi_check(uint64 CallSiteTypeId, void *TargetAddr)
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This function provides external modules with access to CFI checks for the
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targets inside this DSO. For each known ``CallSiteTypeId``, this function
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performs an ``llvm.type.test`` with the corresponding type identifier. It
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aborts if the type is unknown, or if the check fails.
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The basic implementation is a large switch statement over all values
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of CallSiteTypeId supported by this DSO, and each case is similar to
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the InlinedFastCheck() in the basic CFI mode.
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CFI Shadow
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----------
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To route CFI checks to the target DSO's __cfi_check function, a
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mapping from possible virtual / indirect call targets to
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the corresponding __cfi_check functions is maintained. This mapping is
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implemented as a sparse array of 2 bytes for every possible page (4096
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bytes) of memory. The table is kept readonly (FIXME: not yet) most of
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the time.
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There are 3 types of shadow values:
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- Address in a CFI-instrumented DSO.
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- Unchecked address (a “trusted” non-instrumented DSO). Encoded as
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value 0xFFFF.
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- Invalid address (everything else). Encoded as value 0.
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For a CFI-instrumented DSO, a shadow value encodes the address of the
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__cfi_check function for all call targets in the corresponding memory
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page. If Addr is the target address, and V is the shadow value, then
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the address of __cfi_check is calculated as
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.. code-block:: none
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__cfi_check = AlignUpTo(Addr, 4096) - (V + 1) * 4096
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This works as long as __cfi_check is aligned by 4096 bytes and located
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below any call targets in its DSO, but not more than 256MB apart from
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them.
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CFI_SlowPath
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------------
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The slow path check is implemented in compiler-rt library as
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.. code-block:: none
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void __cfi_slowpath(uint64 CallSiteTypeId, void *TargetAddr)
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This functions loads a shadow value for ``TargetAddr``, finds the
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address of __cfi_check as described above and calls that.
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Position-independent executable requirement
|
||
-------------------------------------------
|
||
|
||
Cross-DSO CFI mode requires that the main executable is built as PIE.
|
||
In non-PIE executables the address of an external function (taken from
|
||
the main executable) is the address of that function’s PLT record in
|
||
the main executable. This would break the CFI checks.
|
||
|
||
|
||
Hardware support
|
||
================
|
||
|
||
We believe that the above design can be efficiently implemented in hardware.
|
||
A single new instruction added to an ISA would allow to perform the CFI check
|
||
with fewer bytes per check (smaller code size overhead) and potentially more
|
||
efficiently. The current software-only instrumentation requires at least
|
||
32-bytes per check (on x86_64).
|
||
A hardware instruction may probably be less than ~ 12 bytes.
|
||
Such instruction would check that the argument pointer is in-bounds,
|
||
and is properly aligned, and if the checks fail it will either trap (in monolithic scheme)
|
||
or call the slow path function (cross-DSO scheme).
|
||
The bit vector lookup is probably too complex for a hardware implementation.
|
||
|
||
.. code-block:: none
|
||
|
||
// This instruction checks that 'Ptr'
|
||
// * is aligned by (1 << kAlignment) and
|
||
// * is inside [kRangeBeg, kRangeBeg+(kRangeSize<<kAlignment))
|
||
// and if the check fails it jumps to the given target (slow path).
|
||
//
|
||
// 'Ptr' is a register, pointing to the virtual function table
|
||
// or to the function which we need to check. We may require an explicit
|
||
// fixed register to be used.
|
||
// 'kAlignment' is a 4-bit constant.
|
||
// 'kRangeSize' is a ~20-bit constant.
|
||
// 'kRangeBeg' is a PC-relative constant (~28 bits)
|
||
// pointing to the beginning of the allowed range for 'Ptr'.
|
||
// 'kFailedCheckTarget': is a PC-relative constant (~28 bits)
|
||
// representing the target to branch to when the check fails.
|
||
// If kFailedCheckTarget==0, the process will trap
|
||
// (monolithic binary scheme).
|
||
// Otherwise it will jump to a handler that implements `CFI_SlowPath`
|
||
// (cross-DSO scheme).
|
||
CFI_Check(Ptr, kAlignment, kRangeSize, kRangeBeg, kFailedCheckTarget) {
|
||
if (Ptr < kRangeBeg ||
|
||
Ptr >= kRangeBeg + (kRangeSize << kAlignment) ||
|
||
Ptr & ((1 << kAlignment) - 1))
|
||
Jump(kFailedCheckTarget);
|
||
}
|
||
|
||
An alternative and more compact enconding would not use `kFailedCheckTarget`,
|
||
and will trap on check failure instead.
|
||
This will allow us to fit the instruction into **8-9 bytes**.
|
||
The cross-DSO checks will be performed by a trap handler and
|
||
performance-critical ones will have to be black-listed and checked using the
|
||
software-only scheme.
|
||
|
||
Note that such hardware extension would be complementary to checks
|
||
at the callee side, such as e.g. **Intel ENDBRANCH**.
|
||
Moreover, CFI would have two benefits over ENDBRANCH: a) precision and b)
|
||
ability to protect against invalid casts between polymorphic types.
|