forked from OSchip/llvm-project
14 lines
455 B
LLVM
14 lines
455 B
LLVM
;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
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;CHECK: RECIP_IEEE * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
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define amdgpu_ps void @test(<4 x float> inreg %reg0) {
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%r0 = extractelement <4 x float> %reg0, i32 0
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%r1 = fdiv float 1.0, %r0
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%vec = insertelement <4 x float> undef, float %r1, i32 0
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call void @llvm.r600.store.swizzle(<4 x float> %vec, i32 0, i32 0)
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ret void
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}
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declare void @llvm.r600.store.swizzle(<4 x float>, i32, i32)
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