Matt Arsenault 9087ef0765 GlobalISel: Allow CSE of G_IMPLICIT_DEF ... The legalizer produces a lot of these, and they make reading legalized MIR annoying. For some reason, this does seem to sometimes introduce copies of implicit def, which is dumb.		2020-02-05 17:47:21 -05:00
..
AArch64	GlobalISel: Allow CSE of G_IMPLICIT_DEF	2020-02-05 17:47:21 -05:00
AMDGPU	GlobalISel: Allow CSE of G_IMPLICIT_DEF	2020-02-05 17:47:21 -05:00
ARC	…
ARM	[ARM] Expand vector reduction intrinsics on soft float	2020-02-03 18:49:12 +01:00
AVR	…
BPF	[BPF] disable ReduceLoadWidth during SelectionDag phase	2020-02-04 18:37:43 -08:00
Generic	[CodeGenPrepare] Make TargetPassConfig required	2020-02-02 09:28:45 -08:00
Hexagon	[Hexagon] Add REQUIRES: asserts to a testcase using -debug-only	2020-01-21 13:22:01 -06:00
Inputs	…
Lanai	Revert "[Support] make report_fatal_error `abort` instead of `exit`"	2020-01-15 17:52:25 -08:00
MIR	AMDGPU: Split denormal mode tracking bits	2020-02-04 10:44:21 -08:00
MSP430	…
Mips	Don't mark MIPS TRAP as isTerminator	2020-02-01 15:50:22 +00:00
NVPTX	Consolidate internal denormal flushing controls	2020-01-17 20:09:53 -05:00
PowerPC	[AIX] Don't use a zero fill with a second parameter	2020-02-03 15:16:08 -05:00
RISCV	[TargetLowering] SimplifyDemandedBits - Remove ashr if all our demandedbits already match the sign bit	2020-01-25 17:36:46 +00:00
SPARC	Revert "[Support] make report_fatal_error `abort` instead of `exit`"	2020-01-15 17:52:25 -08:00
SystemZ	[SystemZ] Improve handling of inline asm constraints.	2020-02-05 17:04:16 -05:00
Thumb	…
Thumb2	[ARM] Add extra use test for MVE VPT blocks. NFC	2020-02-05 18:32:18 +00:00
VE	[VE] half fptrunc+store&load+fpext	2020-02-04 17:16:09 +01:00
WebAssembly	Revert "[WebAssembly][InstrEmitter] Foundation for multivalue call lowering"	2020-02-04 20:04:59 -08:00
WinCFGuard	…
WinEH	…
X86	GlobalISel: Allow CSE of G_IMPLICIT_DEF	2020-02-05 17:47:21 -05:00
XCore	Revert "[Support] make report_fatal_error `abort` instead of `exit`"	2020-01-15 17:52:25 -08:00