llvm-project/llvm/test
Quentin Colombet d5e57b731f [CodeGenPrepare] Move sign/zero extensions near loads using type promotion.
This patch extends the optimization in CodeGenPrepare that moves a sign/zero
extension near a load when the target can combine them. The optimization may
promote any operations between the extension and the load to make that possible.

Although this optimization may be beneficial for all targets, in particular
AArch64, this is enabled for X86 only as I have not benchmarked it for other
targets yet.


** Context **

Most targets feature extended loads, i.e., loads that perform a zero or sign
extension for free. In that context it is interesting to expose such pattern in
CodeGenPrepare so that the instruction selection pass can form such loads.
Sometimes, this pattern is blocked because of instructions between the load and
the extension. When those instructions are promotable to the extended type, we
can expose this pattern.


** Motivating Example **

Let us consider an example:
define void @foo(i8* %addr1, i32* %addr2, i8 %a, i32 %b) {
  %ld = load i8* %addr1
  %zextld = zext i8 %ld to i32
  %ld2 = load i32* %addr2
  %add = add nsw i32 %ld2, %zextld
  %sextadd = sext i32 %add to i64
  %zexta = zext i8 %a to i32
  %addza = add nsw i32 %zexta, %zextld
  %sextaddza = sext i32 %addza to i64
  %addb = add nsw i32 %b, %zextld
  %sextaddb = sext i32 %addb to i64
  call void @dummy(i64 %sextadd, i64 %sextaddza, i64 %sextaddb)
  ret void
}

As it is, this IR generates the following assembly on x86_64:
[...]
  movzbl  (%rdi), %eax   # zero-extended load
  movl  (%rsi), %es      # plain load
  addl  %eax, %esi       # 32-bit add
  movslq  %esi, %rdi     # sign extend the result of add
  movzbl  %dl, %edx      # zero extend the first argument
  addl  %eax, %edx       # 32-bit add
  movslq  %edx, %rsi     # sign extend the result of add
  addl  %eax, %ecx       # 32-bit add
  movslq  %ecx, %rdx     # sign extend the result of add
[...]
The throughput of this sequence is 7.45 cycles on Ivy Bridge according to IACA.

Now, by promoting the additions to form more extended loads we would generate:
[...]
  movzbl  (%rdi), %eax   # zero-extended load
  movslq  (%rsi), %rdi   # sign-extended load
  addq  %rax, %rdi       # 64-bit add
  movzbl  %dl, %esi      # zero extend the first argument
  addq  %rax, %rsi       # 64-bit add
  movslq  %ecx, %rdx     # sign extend the second argument
  addq  %rax, %rdx       # 64-bit add
[...]
The throughput of this sequence is 6.15 cycles on Ivy Bridge according to IACA.

This kind of sequences happen a lot on code using 32-bit indexes on 64-bit
architectures.

Note: The throughput numbers are similar on Sandy Bridge and Haswell.


** Proposed Solution **

To avoid the penalty of all these sign/zero extensions, we merge them in the
loads at the beginning of the chain of computation by promoting all the chain of
computation on the extended type. The promotion is done if and only if we do not
introduce new extensions, i.e., if we do not degrade the code quality.
To achieve this, we extend the existing “move ext to load” optimization with the
promotion mechanism introduced to match larger patterns for addressing mode
(r200947).
The idea of this extension is to perform the following transformation:
ext(promotableInst1(...(promotableInstN(load))))
=>
promotedInst1(...(promotedInstN(ext(load))))

The promotion mechanism in that optimization is enabled by a new TargetLowering
switch, which is off by default. In other words, by default, the optimization
performs the “move ext to load” optimization as it was before this patch.


** Performance **

Configuration: x86_64: Ivy Bridge fixed at 2900MHz running OS X 10.10.
Tested Optimization Levels: O3/Os
Tests: llvm-testsuite + externals.
Results:
- No regression beside noise.
- Improvements:
CINT2006/473.astar:  ~2%
Benchmarks/PAQ8p: ~2%
Misc/perlin: ~3%

The results are consistent for both O3 and Os.

<rdar://problem/18310086>

llvm-svn: 224351
2014-12-16 19:09:03 +00:00
..
Analysis IR: Make metadata typeless in assembly 2014-12-15 19:07:53 +00:00
Assembler DebugInfo: Update testcase to actually check something 2014-12-16 07:08:19 +00:00
Bindings IR: Make metadata typeless in assembly 2014-12-15 19:07:53 +00:00
Bitcode IR: Make metadata typeless in assembly 2014-12-15 19:07:53 +00:00
BugPoint IR: Make metadata typeless in assembly 2014-12-15 19:07:53 +00:00
CodeGen [CodeGenPrepare] Move sign/zero extensions near loads using type promotion. 2014-12-16 19:09:03 +00:00
DebugInfo ARM/AArch64: Attach the FrameSetup MIFlag to CFI instructions. 2014-12-16 00:20:49 +00:00
ExecutionEngine Small model and JIT generally don't go well with each other. 2014-11-25 17:14:22 +00:00
Feature IR: Make metadata typeless in assembly 2014-12-15 19:07:53 +00:00
FileCheck
Instrumentation IR: Make metadata typeless in assembly 2014-12-15 19:07:53 +00:00
Integer
JitListener IR: Make metadata typeless in assembly 2014-12-15 19:07:53 +00:00
LTO Lazily link GlobalVariables and GlobalAliases. 2014-12-08 18:45:16 +00:00
Linker IR: Make metadata typeless in assembly 2014-12-15 19:07:53 +00:00
MC [MC] Reset the MCInst in the matcher function before adding opcode/operands. 2014-12-16 18:05:28 +00:00
Object Start adding thin archive support. 2014-12-16 01:43:41 +00:00
Other [lit] Parse all strings as UTF-8 rather than ASCII. 2014-09-12 16:46:05 +00:00
SymbolRewriter Transform: add SymbolRewriter pass 2014-11-07 21:32:08 +00:00
TableGen [AVX512] Added intrinsics for VPCMPEQB and VPCMPEQW. 2014-09-30 11:32:22 +00:00
Transforms Masked Load and Store Intrinsics in loop vectorizer. 2014-12-16 11:50:42 +00:00
Unit
Verifier IR: Stop printing 'metadata' in Metadata::print() 2014-12-16 07:40:31 +00:00
YAMLParser
tools Fix a bug in llvm-objdump’s -private-headers for 32-bit Mach-O files 2014-12-16 01:14:45 +00:00
.clang-format
CMakeLists.txt Revert r224149, llvm-dsymutil was already here. 2014-12-12 21:25:07 +00:00
Makefile OCAMLFLAGS can contain =, don't use = with sed 2014-11-13 09:29:30 +00:00
Makefile.tests
TestRunner.sh
lit.cfg Initial dsymutil tool commit. 2014-12-12 17:31:24 +00:00
lit.site.cfg.in [OCaml] [autoconf] Migrate to ocamlfind. 2014-10-30 08:29:45 +00:00