forked from OSchip/llvm-project
40 lines
1.5 KiB
LLVM
40 lines
1.5 KiB
LLVM
; RUN: opt %loadPolly -polly-scops %s -analyze | FileCheck %s
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target datalayout = "e-m:e-i64:64-i128:128-n8:16:32:64-S128"
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target triple = "aarch64--linux-android"
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; Check for SCOP:
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; CHECK: Stmt_for_body8_us_us95_i
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; CHECK-NEXT: Domain :=
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; CHECK-NEXT: [p_0] -> { Stmt_for_body8_us_us95_i[i0] : 0 <= i0 <= 4 };
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; CHECK-NEXT: Schedule :=
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; CHECK-NEXT: [p_0] -> { Stmt_for_body8_us_us95_i[i0] -> [i0] };
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; CHECK-NEXT: MustWriteAccess := [Reduction Type: NONE] [Scalar: 0]
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; CHECK-NEXT: [p_0] -> { Stmt_for_body8_us_us95_i[i0] -> MemRef0[1 - p_0] };
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; CHECK-NEXT: }
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define void @test1() unnamed_addr align 2 {
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entry:
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%xFactor.0.reload = load i32, i32* undef
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%0 = load i8*, i8** undef, align 8
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%div = udiv i32 0, %xFactor.0.reload
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%1 = load i32, i32* undef, align 4
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%mul = mul i32 %1, %xFactor.0.reload
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%col.023.us.us85.i = add i32 %div, -1
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%mul11.us.us93.i = mul i32 %col.023.us.us85.i, %mul
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br label %for.body8.us.us95.i
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for.body8.us.us95.i:
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%niter.i = phi i32 [ %niter.i.next, %for.body8.us.us95.i ], [ 0, %entry ]
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%add12.us.us100.1.i = add i32 1, %mul11.us.us93.i
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%idxprom13.us.us101.1.i = zext i32 %add12.us.us100.1.i to i64
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%arrayidx14.us.us102.1.i = getelementptr inbounds i8, i8* %0, i64 %idxprom13.us.us101.1.i
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store i8 0, i8* %arrayidx14.us.us102.1.i, align 1
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%niter.ncmp.3.i = icmp eq i32 %niter.i, 4
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%niter.i.next = add i32 %niter.i, 1
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br i1 %niter.ncmp.3.i, label %for.body8.us.us95.epil.i.preheader, label %for.body8.us.us95.i
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for.body8.us.us95.epil.i.preheader:
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ret void
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}
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