Dmitry Preobrazhensky 05b3aadfff [AMDGPU][MC][GFX11] Correct v_dot2_f16_f16 and v_dot2_bf16_bf16 ... Enable SGPRs for the following operands of these opcodes: - src operands of VOP3 variant. - src2 operand of DPP variants. Differential Revision: https://reviews.llvm.org/D130989		2022-08-03 15:08:23 +03:00
..
AArch64	[llvm-objdump,ARM] Fix a lot more tests.	2022-07-26 10:22:02 +01:00
AMDGPU	[AMDGPU][MC][GFX11] Correct v_dot2_f16_f16 and v_dot2_bf16_bf16	2022-08-03 15:08:23 +03:00
ARM	[Arm] Fix parsing and emission of Tag_also_compatible_with eabi attribute	2022-08-01 13:28:01 +01:00
AVR	[MC][AVR] Implement decoding ST/LD	2022-05-05 01:53:59 +00:00
AsmParser	[Object] Add ELF section type for offloading objects	2022-07-07 12:20:30 -04:00
BPF	[BPF] Implement mod operation	2022-05-12 10:59:18 +08:00
COFF	[MC] Avoid UAF in WinCOFFObjectWriter with weak symbols.	2022-07-16 13:24:08 +03:00
CSKY	[CSKY] Add missing codegen pattern for 16-bit instruction	2022-03-29 16:05:30 +08:00
Disassembler	[AMDGPU][MC][GFX11] Correct v_dot2_f16_f16 and v_dot2_bf16_bf16	2022-08-03 15:08:23 +03:00
ELF	[MC][test] Rename two --compress-debug-sections=zlib tests	2022-07-28 10:57:56 -07:00
GOFF	[SystemZ][z/OS] Implement detection and handling for XPLink Leaf procedures.	2022-07-17 14:30:33 -04:00
Hexagon	[Hexagon] Duplex error: wrong branch hint	2022-01-07 12:04:01 -08:00
Lanai	…
LoongArch	[LoongArch] Add the missing ld.d instruction definition	2022-06-02 14:57:23 +08:00
M68k	[M68k][Disassembler] Adopt the new variable length decoder	2022-05-15 08:44:58 +08:00
MSP430	…
MachO	[MC][re-land] Omit DWARF unwind info if compact unwind is present where eligible	2022-06-12 17:24:19 -04:00
Mips	[MC][Mips] Support .reloc *, BFD_RELOC_{NONE,16,32,64}, *	2022-06-30 16:39:23 -07:00
PowerPC	[llvm-objdump] Default to --mcpu=future for PPC64	2022-06-30 11:30:35 -07:00
RISCV	[RISCV] Add Predicate to c.lw/c.sw/c.lwsp/c.swsp InstAliases with no offset.	2022-07-26 11:06:00 -07:00
Sparc	[SPARC][MC] Support more relocation types	2022-06-05 14:09:39 -04:00
SystemZ	[SystemZ] Bugfix for symbolic displacements.	2022-05-22 17:41:36 +02:00
VE	[VE] Support srel32 in symbol reference	2021-12-13 20:29:17 +09:00
WebAssembly	[WebAssembly] Implement remaining relaxed SIMD instructions	2022-06-08 10:32:10 -07:00
X86	[X86][MC] Avoid emitting incorrect warning for complex FMUL	2022-07-28 13:58:34 +08:00
XCOFF	…