forked from OSchip/llvm-project
8d7c351799
Expand on LONG_BRANCH_LUi and LONG_BRANCH_(D)ADDiu pseudo instructions by creating variants which support less operands/accept GPR64Opnds as their operand in order to appease the machine verifier pass. Differential Revision: https://reviews.llvm.org/D53977 llvm-svn: 346133 |
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| .. | ||
| branch-limits-fp-micromips.mir | ||
| branch-limits-fp-micromipsr6.mir | ||
| branch-limits-fp-mips.mir | ||
| branch-limits-fp-mipsr6.mir | ||
| branch-limits-int-microMIPS.mir | ||
| branch-limits-int-micromipsr6.mir | ||
| branch-limits-int-mips64.mir | ||
| branch-limits-int-mips64r6.mir | ||
| branch-limits-int-mipsr6.mir | ||
| branch-limits-int.mir | ||
| branch-limits-msa.mir | ||
| compact-branches-long-branch.ll | ||
| long-branch-expansion-1.ll | ||
| long-branch-expansion-2.ll | ||
| long-branch-expansion-3.ll | ||