forked from OSchip/llvm-project
45 lines
1.1 KiB
LLVM
45 lines
1.1 KiB
LLVM
; RUN: llc < %s -march=xcore | FileCheck %s
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declare void @llvm.xcore.setv.p1i8(i8 addrspace(1)* %r, i8* %p)
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declare i8* @llvm.xcore.waitevent()
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declare i8* @llvm.xcore.checkevent(i8*)
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declare void @llvm.xcore.clre()
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define i32 @f(i8 addrspace(1)* %r) nounwind {
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; CHECK: f:
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entry:
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; CHECK: clre
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call void @llvm.xcore.clre()
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call void @llvm.xcore.setv.p1i8(i8 addrspace(1)* %r, i8* blockaddress(@f, %L1))
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call void @llvm.xcore.setv.p1i8(i8 addrspace(1)* %r, i8* blockaddress(@f, %L2))
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%goto_addr = call i8* @llvm.xcore.waitevent()
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; CHECK: waiteu
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indirectbr i8* %goto_addr, [label %L1, label %L2]
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L1:
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br label %ret
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L2:
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br label %ret
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ret:
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%retval = phi i32 [1, %L1], [2, %L2]
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ret i32 %retval
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}
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define i32 @g(i8 addrspace(1)* %r) nounwind {
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; CHECK: g:
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entry:
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; CHECK: clre
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call void @llvm.xcore.clre()
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call void @llvm.xcore.setv.p1i8(i8 addrspace(1)* %r, i8* blockaddress(@f, %L1))
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%goto_addr = call i8* @llvm.xcore.checkevent(i8 *blockaddress(@f, %L2))
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; CHECK: setsr 1
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; CHECK: clrsr 1
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indirectbr i8* %goto_addr, [label %L1, label %L2]
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L1:
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br label %ret
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L2:
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br label %ret
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ret:
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%retval = phi i32 [1, %L1], [2, %L2]
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ret i32 %retval
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}
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