forked from OSchip/llvm-project
108 lines
2.1 KiB
LLVM
108 lines
2.1 KiB
LLVM
; RUN: llc -march=mips64el -mcpu=mips64r2 < %s | FileCheck -check-prefixes=ALL,MIPS %s
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; RUN: llc -march=mips64el -mcpu=mips64r6 -mattr=micromips < %s | FileCheck -check-prefixes=ALL,MICROMIPS %s
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define i64 @f0(i64 %a0, i64 %a1) nounwind readnone {
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entry:
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; ALL: dsllv
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%shl = shl i64 %a0, %a1
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ret i64 %shl
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}
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define i64 @f1(i64 %a0, i64 %a1) nounwind readnone {
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entry:
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; ALL: dsrav
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%shr = ashr i64 %a0, %a1
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ret i64 %shr
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}
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define i64 @f2(i64 %a0, i64 %a1) nounwind readnone {
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entry:
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; ALL: dsrlv
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%shr = lshr i64 %a0, %a1
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ret i64 %shr
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}
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define i64 @f3(i64 %a0) nounwind readnone {
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entry:
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; ALL: dsll ${{[0-9]+}}, ${{[0-9]+}}, 10
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%shl = shl i64 %a0, 10
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ret i64 %shl
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}
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define i64 @f4(i64 %a0) nounwind readnone {
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entry:
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; ALL: dsra ${{[0-9]+}}, ${{[0-9]+}}, 10
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%shr = ashr i64 %a0, 10
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ret i64 %shr
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}
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define i64 @f5(i64 %a0) nounwind readnone {
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entry:
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; ALL: dsrl ${{[0-9]+}}, ${{[0-9]+}}, 10
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%shr = lshr i64 %a0, 10
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ret i64 %shr
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}
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define i64 @f6(i64 %a0) nounwind readnone {
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entry:
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; ALL: dsll ${{[0-9]+}}, ${{[0-9]+}}, 40
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%shl = shl i64 %a0, 40
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ret i64 %shl
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}
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define i64 @f7(i64 %a0) nounwind readnone {
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entry:
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; ALL: dsra ${{[0-9]+}}, ${{[0-9]+}}, 40
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%shr = ashr i64 %a0, 40
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ret i64 %shr
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}
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define i64 @f8(i64 %a0) nounwind readnone {
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entry:
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; ALL: dsrl ${{[0-9]+}}, ${{[0-9]+}}, 40
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%shr = lshr i64 %a0, 40
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ret i64 %shr
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}
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define i64 @f9(i64 %a0, i64 %a1) nounwind readnone {
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entry:
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; CHECK-NOT: sll
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; ALL: drotrv
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%shr = lshr i64 %a0, %a1
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%sub = sub i64 64, %a1
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%shl = shl i64 %a0, %sub
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%or = or i64 %shl, %shr
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ret i64 %or
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}
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define i64 @f10(i64 %a0, i64 %a1) nounwind readnone {
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entry:
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; CHECK-NOT: sll
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; ALL: drotrv
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%shl = shl i64 %a0, %a1
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%sub = sub i64 64, %a1
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%shr = lshr i64 %a0, %sub
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%or = or i64 %shr, %shl
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ret i64 %or
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}
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define i64 @f11(i64 %a0) nounwind readnone {
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entry:
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; ALL: drotr ${{[0-9]+}}, ${{[0-9]+}}, 10
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%shr = lshr i64 %a0, 10
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%shl = shl i64 %a0, 54
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%or = or i64 %shr, %shl
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ret i64 %or
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}
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define i64 @f12(i64 %a0) nounwind readnone {
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entry:
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; ALL: drotr ${{[0-9]+}}, ${{[0-9]+}}, 54
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%shl = shl i64 %a0, 10
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%shr = lshr i64 %a0, 54
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%or = or i64 %shl, %shr
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ret i64 %or
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}
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