forked from OSchip/llvm-project
55 lines
1.7 KiB
C++
55 lines
1.7 KiB
C++
//===-- Nios2InstrInfo.cpp - Nios2 Instruction Information ----------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the Nios2 implementation of the TargetInstrInfo class.
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//
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//===----------------------------------------------------------------------===//
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#include "Nios2InstrInfo.h"
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#include "Nios2TargetMachine.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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using namespace llvm;
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#define GET_INSTRINFO_CTOR_DTOR
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#include "Nios2GenInstrInfo.inc"
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// Pin the vtable to this file.
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void Nios2InstrInfo::anchor() {}
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Nios2InstrInfo::Nios2InstrInfo(Nios2Subtarget &ST)
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: Nios2GenInstrInfo(), RI(ST), Subtarget(ST) {}
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/// Expand Pseudo instructions into real backend instructions
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bool Nios2InstrInfo::expandPostRAPseudo(MachineInstr &MI) const {
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MachineBasicBlock &MBB = *MI.getParent();
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switch (MI.getDesc().getOpcode()) {
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default:
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return false;
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case Nios2::RetRA:
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BuildMI(MBB, MI, MI.getDebugLoc(), get(Nios2::RET_R1)).addReg(Nios2::RA);
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break;
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}
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MBB.erase(MI);
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return true;
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}
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void Nios2InstrInfo::copyPhysReg(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I,
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const DebugLoc &DL, unsigned DestReg,
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unsigned SrcReg, bool KillSrc) const {
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unsigned opc = Subtarget.hasNios2r2() ? Nios2::ADD_R2 : Nios2::ADD_R1;
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BuildMI(MBB, I, DL, get(opc))
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.addReg(DestReg, RegState::Define)
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.addReg(Nios2::ZERO)
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.addReg(SrcReg, getKillRegState(KillSrc));
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}
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