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AsmParser
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[AMDGPU] Assembler: support SDWA for VOPC instructions
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2016-07-01 09:59:21 +00:00 |
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Disassembler
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AMDGPU: Fix trailing whitespace
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2016-06-10 02:18:02 +00:00 |
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InstPrinter
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[AMDGPU] AsmParser: Support for sext() modifier in SDWA. Some code cleaning in AMDGPUOperand.
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2016-06-10 09:57:59 +00:00 |
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MCTargetDesc
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Delete MCCodeGenInfo.
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2016-06-30 18:25:11 +00:00 |
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TargetInfo
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Remove autoconf support
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2016-01-26 21:29:08 +00:00 |
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Utils
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[AMDGPU] Enable absolute expression initializer for amd_kernel_code_t fields.
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2016-06-23 14:13:06 +00:00 |
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AMDGPU.h
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AMDGPU: Add stub custom CodeGenPrepare pass
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2016-06-24 07:07:55 +00:00 |
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AMDGPU.td
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AMDGPU: Add feature for unaligned access
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2016-07-01 23:03:44 +00:00 |
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AMDGPUAlwaysInlinePass.cpp
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Cloning: Clean up the interface to the CloneFunction function.
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2016-05-10 20:23:24 +00:00 |
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AMDGPUAnnotateKernelFeatures.cpp
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AMDGPU: Fix constantexpr addrspacecasts
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2016-06-06 20:03:31 +00:00 |
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AMDGPUAnnotateUniformValues.cpp
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Add optimization bisect opt-in calls for AMDGPU passes
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2016-04-25 22:23:44 +00:00 |
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AMDGPUAsmPrinter.cpp
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[AMDGPU] Emit debugger prologue and emit the rest of the debugger fields in the kernel code header
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2016-06-25 03:11:28 +00:00 |
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AMDGPUAsmPrinter.h
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[AMDGPU] Emit debugger prologue and emit the rest of the debugger fields in the kernel code header
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2016-06-25 03:11:28 +00:00 |
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AMDGPUCallLowering.cpp
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AMDGPU: Add skeleton GlobalIsel implementation
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2016-04-14 19:09:28 +00:00 |
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AMDGPUCallLowering.h
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AMDGPU: Add skeleton GlobalIsel implementation
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2016-04-14 19:09:28 +00:00 |
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AMDGPUCallingConv.td
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AMDGPU: Fix kernel argument alignment impacting stack size
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2016-06-18 05:15:53 +00:00 |
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AMDGPUCodeGenPrepare.cpp
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AMDGPU: Add stub custom CodeGenPrepare pass
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2016-06-24 07:07:55 +00:00 |
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AMDGPUFrameLowering.cpp
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AMDGPU: Cleanup subtarget handling.
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2016-06-24 06:30:11 +00:00 |
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AMDGPUFrameLowering.h
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AMDGPU: Cleanup subtarget handling.
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2016-06-24 06:30:11 +00:00 |
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AMDGPUISelDAGToDAG.cpp
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AMDGPU: Cleanup subtarget handling.
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2016-06-24 06:30:11 +00:00 |
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AMDGPUISelLowering.cpp
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AMDGPU: Expand unaligned accesses early
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2016-07-01 22:55:55 +00:00 |
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AMDGPUISelLowering.h
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AMDGPU: Expand unaligned accesses early
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2016-07-01 22:55:55 +00:00 |
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AMDGPUInstrInfo.cpp
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Fix "not all control paths return a value" warning on MSVC
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2016-06-27 12:58:10 +00:00 |
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AMDGPUInstrInfo.h
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AMDGPU: Cleanup subtarget handling.
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2016-06-24 06:30:11 +00:00 |
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AMDGPUInstrInfo.td
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AMDGPU: Fix verifier errors in SILowerControlFlow
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2016-06-22 20:15:28 +00:00 |
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AMDGPUInstructions.td
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AMDGPU: Fix trailing whitespace
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2016-06-10 02:18:02 +00:00 |
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AMDGPUIntrinsicInfo.cpp
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[llvm-tblgen] Avoid StringMatcher for GCC and MS builtin names
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2016-01-27 01:43:12 +00:00 |
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AMDGPUIntrinsicInfo.h
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AMDGPU: R600 code splitting cleanup
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2016-03-11 08:00:27 +00:00 |
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AMDGPUIntrinsics.td
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AMDGPU: Remove bfi and bfm intrinsics
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2016-02-08 19:06:01 +00:00 |
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AMDGPUMCInstLower.cpp
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CodeGen: Use MachineInstr& in TargetInstrInfo, NFC
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2016-06-30 00:01:54 +00:00 |
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AMDGPUMCInstLower.h
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AMDGPU: R600 code splitting cleanup
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2016-03-11 08:00:27 +00:00 |
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AMDGPUMachineFunction.cpp
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Resubmit r268719 - AMDGPU/SI: Add amdgpu_kernel calling convention. Part 2.
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2016-07-01 10:00:58 +00:00 |
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AMDGPUMachineFunction.h
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Resubmit r268719 - AMDGPU/SI: Add amdgpu_kernel calling convention. Part 2.
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2016-07-01 10:00:58 +00:00 |
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AMDGPUOpenCLImageTypeLoweringPass.cpp
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[NFC] Header cleanup
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2016-04-18 09:17:29 +00:00 |
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AMDGPUPromoteAlloca.cpp
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AMDGPU: Move subtarget feature checks into passes
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2016-06-27 20:32:13 +00:00 |
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AMDGPURegisterInfo.cpp
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AMDGPU: Cleanup subtarget handling.
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2016-06-24 06:30:11 +00:00 |
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AMDGPURegisterInfo.h
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AMDGPU: Cleanup subtarget handling.
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2016-06-24 06:30:11 +00:00 |
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AMDGPURegisterInfo.td
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AMDGPU: Set SubRegIndex size and offset
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2015-07-30 17:03:11 +00:00 |
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AMDGPUSubtarget.cpp
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AMDGPU: Add feature for unaligned access
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2016-07-01 23:03:44 +00:00 |
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AMDGPUSubtarget.h
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AMDGPU: Add feature for unaligned access
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2016-07-01 23:03:44 +00:00 |
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AMDGPUTargetMachine.cpp
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AMDGPU: Add option to run the load/store vectorizer
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2016-07-01 03:33:52 +00:00 |
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AMDGPUTargetMachine.h
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AMDGPU: Implement per-function subtargets
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2016-06-27 20:48:03 +00:00 |
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AMDGPUTargetObjectFile.cpp
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AMDGPU/SI: Add support for AMD code object version 2.
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2016-05-05 17:03:33 +00:00 |
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AMDGPUTargetObjectFile.h
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AMDGPU/SI: Add support for AMD code object version 2.
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2016-05-05 17:03:33 +00:00 |
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AMDGPUTargetTransformInfo.cpp
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AMDGPU: Implement getLoadStoreVecRegBitWidth
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2016-07-01 00:56:27 +00:00 |
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AMDGPUTargetTransformInfo.h
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AMDGPU: Implement getLoadStoreVecRegBitWidth
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2016-07-01 00:56:27 +00:00 |
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AMDILCFGStructurizer.cpp
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AMDGPU: Cleanup subtarget handling.
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2016-06-24 06:30:11 +00:00 |
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AMDKernelCodeT.h
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[AMDGPU] fix amd_kernel_code_t bit field position as per spec (added missing reserved fields)
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2016-02-24 10:54:25 +00:00 |
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CIInstructions.td
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AMDGPU: Fix flat atomics
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2016-06-09 23:42:54 +00:00 |
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CMakeLists.txt
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AMDGPU: Add stub custom CodeGenPrepare pass
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2016-06-24 07:07:55 +00:00 |
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CaymanInstructions.td
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AMDGPU/EG,CM: Add instruction to read from constant AS (VTX2)
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2016-05-13 20:39:16 +00:00 |
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EvergreenInstructions.td
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AMDGPU/EG,CM: Add instruction to read from constant AS (VTX2)
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2016-05-13 20:39:16 +00:00 |
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GCNHazardRecognizer.cpp
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AMDGPU: Cleanup subtarget handling.
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2016-06-24 06:30:11 +00:00 |
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GCNHazardRecognizer.h
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AMDGPU: Cleanup subtarget handling.
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2016-06-24 06:30:11 +00:00 |
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LLVMBuild.txt
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Update libdeps; AMDGPUCodeGen requires LLVMVectorize.
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2016-07-01 09:55:23 +00:00 |
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Processors.td
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AMDGPU: Fix crashes on unknown processor name
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2016-06-02 18:37:16 +00:00 |
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R600ClauseMergePass.cpp
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CodeGen: Use MachineInstr& in TargetInstrInfo, NFC
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2016-06-30 00:01:54 +00:00 |
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R600ControlFlowFinalizer.cpp
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CodeGen: Use MachineInstr& in TargetInstrInfo, NFC
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2016-06-30 00:01:54 +00:00 |
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R600Defines.h
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AMDGPU: R600 code splitting cleanup
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2016-03-11 08:00:27 +00:00 |
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R600EmitClauseMarkers.cpp
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CodeGen: Use MachineInstr& in TargetInstrInfo, NFC
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2016-06-30 00:01:54 +00:00 |
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R600ExpandSpecialInstrs.cpp
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CodeGen: Use MachineInstr& in TargetInstrInfo, NFC
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2016-06-30 00:01:54 +00:00 |
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R600FrameLowering.cpp
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AMDGPU: Cleanup subtarget handling.
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2016-06-24 06:30:11 +00:00 |
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R600FrameLowering.h
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AMDGPU: Cleanup subtarget handling.
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2016-06-24 06:30:11 +00:00 |
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R600ISelLowering.cpp
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CodeGen: Use MachineInstr& in TargetLowering, NFC
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2016-06-30 22:52:52 +00:00 |
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R600ISelLowering.h
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CodeGen: Use MachineInstr& in TargetLowering, NFC
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2016-06-30 22:52:52 +00:00 |
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R600InstrFormats.td
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…
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R600InstrInfo.cpp
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CodeGen: Use MachineInstr& in TargetInstrInfo, NFC
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2016-06-30 00:01:54 +00:00 |
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R600InstrInfo.h
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CodeGen: Use MachineInstr& in TargetInstrInfo, NFC
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2016-06-30 00:01:54 +00:00 |
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R600Instructions.td
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AMDGPU: Cleanup subtarget handling.
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2016-06-24 06:30:11 +00:00 |
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R600Intrinsics.td
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AMDGPU: Move AMDGPU intrinsics only used by R600
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2016-01-26 04:49:24 +00:00 |
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R600MachineFunctionInfo.cpp
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…
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R600MachineFunctionInfo.h
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[NFC] Header cleanup
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2016-04-18 09:17:29 +00:00 |
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R600MachineScheduler.cpp
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CodeGen: Use MachineInstr& in TargetInstrInfo, NFC
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2016-06-30 00:01:54 +00:00 |
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R600MachineScheduler.h
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AMDGPU: Cleanup subtarget handling.
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2016-06-24 06:30:11 +00:00 |
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R600OptimizeVectorRegisters.cpp
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AMDGPU: Cleanup subtarget handling.
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2016-06-24 06:30:11 +00:00 |
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R600Packetizer.cpp
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CodeGen: Use MachineInstr& in TargetInstrInfo, NFC
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2016-06-30 00:01:54 +00:00 |
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R600RegisterInfo.cpp
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AMDGPU: Cleanup subtarget handling.
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2016-06-24 06:30:11 +00:00 |
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R600RegisterInfo.h
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AMDGPU: Cleanup subtarget handling.
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2016-06-24 06:30:11 +00:00 |
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R600RegisterInfo.td
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…
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R600Schedule.td
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AMDGPU: Fix trailing whitespace
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2016-06-10 02:18:02 +00:00 |
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R600TextureIntrinsicsReplacer.cpp
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AMDGPU: Rename some r600 intrinsics to use correct TargetPrefix
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2016-01-22 19:00:09 +00:00 |
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R700Instructions.td
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…
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SIAnnotateControlFlow.cpp
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AMDGPU: Fix trailing whitespace
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2016-06-10 02:18:02 +00:00 |
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SIDebuggerInsertNops.cpp
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AMDGPU: Cleanup subtarget handling.
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2016-06-24 06:30:11 +00:00 |
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SIDefines.h
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AMDGPU: Cleanup subtarget handling.
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2016-06-24 06:30:11 +00:00 |
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SIFixControlFlowLiveIntervals.cpp
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AMDGPU: Remove unused includes
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2015-09-25 00:28:43 +00:00 |
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SIFixSGPRCopies.cpp
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AMDGPU: Cleanup subtarget handling.
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2016-06-24 06:30:11 +00:00 |
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SIFoldOperands.cpp
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CodeGen: Use MachineInstr& in TargetInstrInfo, NFC
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2016-06-30 00:01:54 +00:00 |
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SIFrameLowering.cpp
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[AMDGPU] Emit debugger prologue and emit the rest of the debugger fields in the kernel code header
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2016-06-25 03:11:28 +00:00 |
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SIFrameLowering.h
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[AMDGPU] Emit debugger prologue and emit the rest of the debugger fields in the kernel code header
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2016-06-25 03:11:28 +00:00 |
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SIISelLowering.cpp
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AMDGPU: Add feature for unaligned access
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2016-07-01 23:03:44 +00:00 |
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SIISelLowering.h
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CodeGen: Use MachineInstr& in TargetLowering, NFC
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2016-06-30 22:52:52 +00:00 |
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SIInsertWaits.cpp
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AMDGPU: Cleanup subtarget handling.
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2016-06-24 06:30:11 +00:00 |
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SIInstrFormats.td
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AMDGPU: Fix verifier errors in SILowerControlFlow
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2016-06-22 20:15:28 +00:00 |
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SIInstrInfo.cpp
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CodeGen: Use MachineInstr& in TargetInstrInfo, NFC
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2016-06-30 00:01:54 +00:00 |
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SIInstrInfo.h
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CodeGen: Use MachineInstr& in TargetInstrInfo, NFC
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2016-06-30 00:01:54 +00:00 |
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SIInstrInfo.td
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AMDGPU: Add feature for unaligned access
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2016-07-01 23:03:44 +00:00 |
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SIInstructions.td
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AMDGPU: Cleanup subtarget handling.
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2016-06-24 06:30:11 +00:00 |
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SIIntrinsics.td
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AMDGPU: Remove llvm.SI.tid intrinsic
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2016-06-17 21:18:41 +00:00 |
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SILoadStoreOptimizer.cpp
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AMDGPU: Move subtarget feature checks into passes
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2016-06-27 20:32:13 +00:00 |
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SILowerControlFlow.cpp
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AMDGPU: Add m0 vgpr load loop block as successor
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2016-06-30 20:49:28 +00:00 |
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SILowerI1Copies.cpp
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AMDGPU: Cleanup subtarget handling.
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2016-06-24 06:30:11 +00:00 |
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SIMachineFunctionInfo.cpp
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SIMachineFunctionInfo.cpp: Appease msc18 to use std::array.
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2016-06-27 10:26:43 +00:00 |
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SIMachineFunctionInfo.h
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SIMachineFunctionInfo.cpp: Appease msc18 to use std::array.
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2016-06-27 10:26:43 +00:00 |
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SIMachineScheduler.cpp
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AMDGPU/SI: Enable testing several variants for si scheduler
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2016-07-01 18:03:46 +00:00 |
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SIMachineScheduler.h
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AMDGPU: R600 code splitting cleanup
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2016-03-11 08:00:27 +00:00 |
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SIRegisterInfo.cpp
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CodeGen: Use MachineInstr& in TargetInstrInfo, NFC
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2016-06-30 00:01:54 +00:00 |
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SIRegisterInfo.h
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AMDGPU: Cleanup subtarget handling.
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2016-06-24 06:30:11 +00:00 |
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SIRegisterInfo.td
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AMDGPU: Define priorities for register classes
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2016-05-21 03:55:07 +00:00 |
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SISchedule.td
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AMDGPU: Define a schedule class for COPY.
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2016-06-24 23:52:11 +00:00 |
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SIShrinkInstructions.cpp
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CodeGen: Use MachineInstr& in TargetInstrInfo, NFC
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2016-06-30 00:01:54 +00:00 |
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SITypeRewriter.cpp
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AMDGPU: Add a shader calling convention
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2016-04-06 19:40:20 +00:00 |
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SIWholeQuadMode.cpp
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AMDGPU: Cleanup subtarget handling.
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2016-06-24 06:30:11 +00:00 |
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VIInstrFormats.td
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[AMDGPU] Assembler: support SDWA for VOPC instructions
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2016-07-01 09:59:21 +00:00 |
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VIInstructions.td
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AMDGPU: Add v_mad 16-bit instructions definition.
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2016-06-16 16:50:04 +00:00 |
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