llvm-project/llvm/test/CodeGen
Nemanja Ivanovic 14d726acd6 [PowerPC] Don't remove single swap between the load and store
The swap removal pass looks to remove swaps when a loaded value is swapped, some
number of lane-insensitive operations are performed and then the value is
swapped again and stored.

However, in a situation where we load the value, swap it and then store it
without swapping again, the pass erroneously removes the single swap. The
reason is that both checks in the same equivalence class:

- load feeds a swap
- swap feeds a store

pass. However, there is no check that the two swaps are actually a single swap.
This patch just fixes that.

Differential revision: https://reviews.llvm.org/D84785
2020-08-04 10:38:15 -05:00
..
AArch64 [AArch64][SVE] Add missing unwind info for SVE registers. 2020-08-04 11:47:06 +01:00
AMDGPU [AMDGPU] Use fma for lowering frem 2020-08-04 16:18:23 +01:00
ARC
ARM [ARM] Generated SSAT and USAT instructions with shift 2020-08-04 09:38:17 +00:00
AVR
BPF [llvm-readobj] Update tests because of changes in llvm-readobj behavior 2020-07-20 10:39:04 +01:00
Generic [llc] (almost) remove `--print-machineinstrs` 2020-07-20 10:43:28 -07:00
Hexagon Align store conditional address 2020-07-30 10:42:00 -05:00
Inputs
Lanai
MIR AMDGPU: Serialize MFI spill fields 2020-07-28 20:01:57 -04:00
MSP430 [MSP430] Declare comparison LibCalls as returning i16 instead of i32 2020-06-30 11:04:22 +03:00
Mips [llvm-readobj] Update tests because of changes in llvm-readobj behavior 2020-07-20 10:39:04 +01:00
NVPTX
PowerPC [PowerPC] Don't remove single swap between the load and store 2020-08-04 10:38:15 -05:00
RISCV [llvm-readobj] Update tests because of changes in llvm-readobj behavior 2020-07-20 10:39:04 +01:00
SPARC [llvm-readobj] Update tests because of changes in llvm-readobj behavior 2020-07-20 10:39:04 +01:00
SystemZ [SystemZ] Ensure -mno-vx disables any use of vector features 2020-07-23 15:34:59 +02:00
Thumb
Thumb2 [ARM] Convert VPSEL to VMOV in tail predicated loops 2020-08-03 22:03:14 +01:00
VE [VE] Change calling convention to follow ABI 2020-08-01 10:08:54 +09:00
WebAssembly [WebAssembly] Implement prototype v128.load{32,64}_zero instructions 2020-08-03 13:54:00 -07:00
WinCFGuard
WinEH
X86 [X86][AVX] isHorizontalBinOp - relax lane-crossing limits for AVX1-only targets. 2020-08-04 14:27:01 +01:00
XCore