forked from OSchip/llvm-project
340 lines
14 KiB
LLVM
340 lines
14 KiB
LLVM
; RUN: opt -hardware-loops -force-hardware-loops=true -hardware-loop-decrement=1 -hardware-loop-counter-bitwidth=32 -force-hardware-loop-guard=true -S %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-EXIT
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; RUN: opt -hardware-loops -force-hardware-loops=true -hardware-loop-decrement=1 -hardware-loop-counter-bitwidth=32 -force-hardware-loop-guard=true -force-hardware-loop-phi=true -S %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-LATCH
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; RUN: opt -hardware-loops -force-hardware-loops=true -hardware-loop-decrement=1 -hardware-loop-counter-bitwidth=32 -force-hardware-loop-guard=false -S %s -o - | FileCheck %s --check-prefix=NO-GUARD
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; NO-GUARD-NOT: @llvm.test.set.loop.iterations
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; CHECK-LABEL: test1
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; CHECK: entry:
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; CHECK: [[CMP:%[^ ]+]] = icmp ugt i32 %N, 2
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; CHECK: [[MAX:%[^ ]+]] = select i1 [[CMP]], i32 %N, i32 2
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; CHECK: [[COUNT:%[^ ]+]] = add i32 [[MAX]], -1
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; CHECK: br i1 %t1, label %do.body.preheader
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; CHECK: do.body.preheader:
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; CHECK: call void @llvm.set.loop.iterations.i32(i32 [[COUNT]])
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; CHECK: br label %do.body
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define void @test1(i1 zeroext %t1, i32* nocapture %a, i32* nocapture readonly %b, i32 %N) {
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entry:
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br i1 %t1, label %do.body, label %if.end
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do.body: ; preds = %do.body, %entry
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%b.addr.0 = phi i32* [ %incdec.ptr, %do.body ], [ %b, %entry ]
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%a.addr.0 = phi i32* [ %incdec.ptr1, %do.body ], [ %a, %entry ]
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%i.0 = phi i32 [ %inc, %do.body ], [ 1, %entry ]
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%incdec.ptr = getelementptr inbounds i32, i32* %b.addr.0, i32 1
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%tmp = load i32, i32* %b.addr.0, align 4
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%incdec.ptr1 = getelementptr inbounds i32, i32* %a.addr.0, i32 1
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store i32 %tmp, i32* %a.addr.0, align 4
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%inc = add nuw i32 %i.0, 1
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%cmp = icmp ult i32 %inc, %N
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br i1 %cmp, label %do.body, label %if.end
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if.end: ; preds = %do.body, %entry
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ret void
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}
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; CHECK-LABEL: test2
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; CHECK-NOT: call i1 @llvm.test.set.loop.iterations
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; CHECK-NOT: call void @llvm.set.loop.iterations
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define void @test2(i1 zeroext %t1, i32* nocapture %a, i32* nocapture readonly %b, i32 %N) {
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entry:
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br i1 %t1, label %do.body, label %if.end
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do.body: ; preds = %do.body, %entry
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%b.addr.0 = phi i32* [ %incdec.ptr, %do.body ], [ %b, %entry ]
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%a.addr.0 = phi i32* [ %incdec.ptr1, %do.body ], [ %a, %entry ]
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%i.0 = phi i32 [ %add, %do.body ], [ 1, %entry ]
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%incdec.ptr = getelementptr inbounds i32, i32* %b.addr.0, i32 1
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%tmp = load i32, i32* %b.addr.0, align 4
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%incdec.ptr1 = getelementptr inbounds i32, i32* %a.addr.0, i32 1
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store i32 %tmp, i32* %a.addr.0, align 4
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%add = add i32 %i.0, 2
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%cmp = icmp ult i32 %add, %N
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br i1 %cmp, label %do.body, label %if.end
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if.end: ; preds = %do.body, %entry
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ret void
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}
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; CHECK-LABEL: test3
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; CHECK: entry:
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; CHECK: [[CMP:%[^ ]+]] = icmp ugt i32 %N, 1
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; CHECK: [[COUNT:%[^ ]+]] = select i1 [[CMP]], i32 %N, i32 1
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; CHECK: br i1 %brmerge.demorgan, label %do.body.preheader
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; CHECK: do.body.preheader:
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; CHECK: call void @llvm.set.loop.iterations.i32(i32 [[COUNT]])
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; CHECK: br label %do.body
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define void @test3(i1 zeroext %t1, i1 zeroext %t2, i32* nocapture %a, i32* nocapture readonly %b, i32 %N) {
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entry:
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%brmerge.demorgan = and i1 %t1, %t2
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br i1 %brmerge.demorgan, label %do.body, label %if.end
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do.body: ; preds = %do.body, %entry
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%b.addr.0 = phi i32* [ %incdec.ptr, %do.body ], [ %b, %entry ]
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%a.addr.0 = phi i32* [ %incdec.ptr3, %do.body ], [ %a, %entry ]
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%i.0 = phi i32 [ %inc, %do.body ], [ 0, %entry ]
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%incdec.ptr = getelementptr inbounds i32, i32* %b.addr.0, i32 1
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%tmp = load i32, i32* %b.addr.0, align 4
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%incdec.ptr3 = getelementptr inbounds i32, i32* %a.addr.0, i32 1
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store i32 %tmp, i32* %a.addr.0, align 4
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%inc = add nuw i32 %i.0, 1
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%cmp = icmp ult i32 %inc, %N
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br i1 %cmp, label %do.body, label %if.end
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if.end: ; preds = %do.body, %entry
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ret void
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}
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; CHECK-LABEL: test4
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; CHECK: entry:
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; CHECK-LATCH: br i1 %brmerge.demorgan, label %while.cond
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; CHECK-LATCH-NOT: call void @llvm{{.*}}loop.iterations
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; CHECK-EXIT: br i1 %brmerge.demorgan, label %while.cond.preheader
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; CHECK-EXIT: while.cond.preheader:
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; CHECK-EXIT: [[COUNT:%[^ ]+]] = add i32 %N, 1
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; CHECK-EXIT: call void @llvm.set.loop.iterations.i32(i32 [[COUNT]])
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; CHECK-EXIT: br label %while.cond
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define void @test4(i1 zeroext %t1, i1 zeroext %t2, i32* nocapture %a, i32* nocapture readonly %b, i32 %N) {
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entry:
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%brmerge.demorgan = and i1 %t1, %t2
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br i1 %brmerge.demorgan, label %while.cond, label %if.end
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while.cond: ; preds = %while.body, %entry
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%b.addr.0 = phi i32* [ %incdec.ptr, %while.body ], [ %b, %entry ]
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%a.addr.0 = phi i32* [ %incdec.ptr3, %while.body ], [ %a, %entry ]
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%i.0 = phi i32 [ %inc, %while.body ], [ 0, %entry ]
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%exitcond = icmp eq i32 %i.0, %N
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br i1 %exitcond, label %if.end, label %while.body
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while.body: ; preds = %while.cond
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%incdec.ptr = getelementptr inbounds i32, i32* %b.addr.0, i32 1
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%tmp = load i32, i32* %b.addr.0, align 4
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%incdec.ptr3 = getelementptr inbounds i32, i32* %a.addr.0, i32 1
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store i32 %tmp, i32* %a.addr.0, align 4
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%inc = add i32 %i.0, 1
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br label %while.cond
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if.end: ; preds = %while.cond, %entry
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ret void
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}
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; CHECK-LABEL: test5
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; CHECK: entry:
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; CHECK: br i1 %or.cond, label %while.body.preheader
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; CHECK: while.body.preheader:
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; CHECK: call void @llvm.set.loop.iterations.i32(i32 %N)
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; CHECK: br label %while.body
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define void @test5(i1 zeroext %t1, i1 zeroext %t2, i32* nocapture %a, i32* nocapture readonly %b, i32 %N) {
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entry:
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%brmerge.demorgan = and i1 %t1, %t2
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%cmp6 = icmp ne i32 %N, 0
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%or.cond = and i1 %brmerge.demorgan, %cmp6
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br i1 %or.cond, label %while.body, label %if.end
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while.body: ; preds = %while.body, %entry
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%i.09 = phi i32 [ %inc, %while.body ], [ 0, %entry ]
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%a.addr.08 = phi i32* [ %incdec.ptr3, %while.body ], [ %a, %entry ]
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%b.addr.07 = phi i32* [ %incdec.ptr, %while.body ], [ %b, %entry ]
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%incdec.ptr = getelementptr inbounds i32, i32* %b.addr.07, i32 1
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%tmp = load i32, i32* %b.addr.07, align 4
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%incdec.ptr3 = getelementptr inbounds i32, i32* %a.addr.08, i32 1
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store i32 %tmp, i32* %a.addr.08, align 4
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%inc = add nuw i32 %i.09, 1
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%exitcond = icmp eq i32 %inc, %N
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br i1 %exitcond, label %if.end, label %while.body
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if.end: ; preds = %while.body, %entry
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ret void
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}
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; CHECK-LABEL: test6
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; CHECK: entry:
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; CHECK: br i1 %brmerge.demorgan, label %while.preheader
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; CHECK: while.preheader:
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; CHECK: [[TEST:%[^ ]+]] = call i1 @llvm.test.set.loop.iterations.i32(i32 %N)
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; CHECK: br i1 [[TEST]], label %while.body.preheader, label %if.end
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; CHECK: while.body.preheader:
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; CHECK: br label %while.body
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define void @test6(i1 zeroext %t1, i1 zeroext %t2, i32* nocapture %a, i32* nocapture readonly %b, i32 %N) {
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entry:
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%brmerge.demorgan = and i1 %t1, %t2
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br i1 %brmerge.demorgan, label %while.preheader, label %if.end
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while.preheader: ; preds = %entry
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%cmp = icmp ne i32 %N, 0
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br i1 %cmp, label %while.body, label %if.end
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while.body: ; preds = %while.body, %while.preheader
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%i.09 = phi i32 [ %inc, %while.body ], [ 0, %while.preheader ]
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%a.addr.08 = phi i32* [ %incdec.ptr3, %while.body ], [ %a, %while.preheader ]
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%b.addr.07 = phi i32* [ %incdec.ptr, %while.body ], [ %b, %while.preheader ]
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%incdec.ptr = getelementptr inbounds i32, i32* %b.addr.07, i32 1
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%tmp = load i32, i32* %b.addr.07, align 4
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%incdec.ptr3 = getelementptr inbounds i32, i32* %a.addr.08, i32 1
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store i32 %tmp, i32* %a.addr.08, align 4
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%inc = add nuw i32 %i.09, 1
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%exitcond = icmp eq i32 %inc, %N
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br i1 %exitcond, label %if.end, label %while.body
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if.end: ; preds = %while.body, %while.preheader, %entry
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ret void
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}
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; CHECK-LABEL: test7
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; CHECK: entry:
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; CHECK: br i1 %brmerge.demorgan, label %while.preheader
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; CHECK: while.preheader:
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; CHECK: [[TEST:%[^ ]+]] = call i1 @llvm.test.set.loop.iterations.i32(i32 %N)
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; CHECK: br i1 [[TEST]], label %while.body.preheader, label %if.end
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; CHECK: while.body.preheader:
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; CHECK: br label %while.body
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define void @test7(i1 zeroext %t1, i1 zeroext %t2, i32* nocapture %a, i32* nocapture readonly %b, i32 %N) {
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entry:
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%brmerge.demorgan = and i1 %t1, %t2
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br i1 %brmerge.demorgan, label %while.preheader, label %if.end
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while.preheader: ; preds = %entry
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%cmp = icmp eq i32 %N, 0
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br i1 %cmp, label %if.end, label %while.body
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while.body: ; preds = %while.body, %while.preheader
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%i.09 = phi i32 [ %inc, %while.body ], [ 0, %while.preheader ]
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%a.addr.08 = phi i32* [ %incdec.ptr3, %while.body ], [ %a, %while.preheader ]
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%b.addr.07 = phi i32* [ %incdec.ptr, %while.body ], [ %b, %while.preheader ]
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%incdec.ptr = getelementptr inbounds i32, i32* %b.addr.07, i32 1
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%tmp = load i32, i32* %b.addr.07, align 4
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%incdec.ptr3 = getelementptr inbounds i32, i32* %a.addr.08, i32 1
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store i32 %tmp, i32* %a.addr.08, align 4
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%inc = add nuw i32 %i.09, 1
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%exitcond = icmp eq i32 %inc, %N
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br i1 %exitcond, label %if.end, label %while.body
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if.end: ; preds = %while.body, %while.preheader, %entry
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ret void
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}
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; TODO: Can we rearrange the conditional blocks so that we can use the test form?
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; CHECK-LABEL: test8
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; CHECK: entry:
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; CHECK: [[CMP:%[^ ]+]] = icmp ne i32 %N, 0
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; CHECK: br i1 [[CMP]], label %while.preheader
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; CHECK: while.preheader:
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; CHECK: br i1 %brmerge.demorgan, label %while.body.preheader
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; CHECK: while.body.preheader:
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; CHECK: call void @llvm.set.loop.iterations.i32(i32 %N)
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; CHECK: br label %while.body
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define void @test8(i1 zeroext %t1, i1 zeroext %t2, i32* nocapture %a, i32* nocapture readonly %b, i32 %N) {
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entry:
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%cmp = icmp ne i32 %N, 0
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br i1 %cmp, label %while.preheader, label %if.end
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while.preheader: ; preds = %entry
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%brmerge.demorgan = and i1 %t1, %t2
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br i1 %brmerge.demorgan, label %while.body, label %if.end
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while.body: ; preds = %while.body, %while.preheader
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%i.09 = phi i32 [ %inc, %while.body ], [ 0, %while.preheader ]
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%a.addr.08 = phi i32* [ %incdec.ptr3, %while.body ], [ %a, %while.preheader ]
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%b.addr.07 = phi i32* [ %incdec.ptr, %while.body ], [ %b, %while.preheader ]
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%incdec.ptr = getelementptr inbounds i32, i32* %b.addr.07, i32 1
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%tmp = load i32, i32* %b.addr.07, align 4
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%incdec.ptr3 = getelementptr inbounds i32, i32* %a.addr.08, i32 1
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store i32 %tmp, i32* %a.addr.08, align 4
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%inc = add nuw i32 %i.09, 1
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%exitcond = icmp eq i32 %inc, %N
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br i1 %exitcond, label %if.end, label %while.body
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if.end: ; preds = %while.body, %while.preheader, %entry
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ret void
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}
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; CHECK-LABEL: test9
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; CHECK: entry:
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; CHECK: br i1 %brmerge.demorgan, label %do.body.preheader
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; CHECK: do.body.preheader:
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; CHECK: call void @llvm.set.loop.iterations.i32(i32 %N)
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; CHECK: br label %do.body
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define void @test9(i1 zeroext %t1, i32* nocapture %a, i32* nocapture readonly %b, i32 %N) {
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entry:
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%cmp = icmp ne i32 %N, 0
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%brmerge.demorgan = and i1 %t1, %cmp
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br i1 %brmerge.demorgan, label %do.body, label %if.end
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do.body: ; preds = %do.body, %entry
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%b.addr.0 = phi i32* [ %incdec.ptr, %do.body ], [ %b, %entry ]
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%a.addr.0 = phi i32* [ %incdec.ptr3, %do.body ], [ %a, %entry ]
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%i.0 = phi i32 [ %inc, %do.body ], [ 0, %entry ]
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%incdec.ptr = getelementptr inbounds i32, i32* %b.addr.0, i32 1
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%tmp = load i32, i32* %b.addr.0, align 4
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%incdec.ptr3 = getelementptr inbounds i32, i32* %a.addr.0, i32 1
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store i32 %tmp, i32* %a.addr.0, align 4
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%inc = add nuw i32 %i.0, 1
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%cmp.1 = icmp ult i32 %inc, %N
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br i1 %cmp.1, label %do.body, label %if.end
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if.end: ; preds = %do.body, %entry
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ret void
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}
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; CHECK-LABEL: test10
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; CHECK: entry:
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; CHECK: br i1 %cmp.1, label %do.body.preheader
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; CHECK: do.body.preheader:
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; CHECK: call void @llvm.set.loop.iterations.i32(i32
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; CHECK: br label %do.body
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define void @test10(i32* nocapture %a, i32* nocapture readonly %b, i32 %N) {
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entry:
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%cmp = icmp ne i32 %N, 0
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%sub = sub i32 %N, 1
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%be = select i1 %cmp, i32 0, i32 %sub
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%cmp.1 = icmp ne i32 %be, 0
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br i1 %cmp.1, label %do.body, label %if.end
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do.body: ; preds = %do.body, %entry
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%b.addr.0 = phi i32* [ %incdec.ptr, %do.body ], [ %b, %entry ]
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%a.addr.0 = phi i32* [ %incdec.ptr3, %do.body ], [ %a, %entry ]
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%i.0 = phi i32 [ %inc, %do.body ], [ 0, %entry ]
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%incdec.ptr = getelementptr inbounds i32, i32* %b.addr.0, i32 1
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%tmp = load i32, i32* %b.addr.0, align 4
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%incdec.ptr3 = getelementptr inbounds i32, i32* %a.addr.0, i32 1
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store i32 %tmp, i32* %a.addr.0, align 4
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%inc = add nuw i32 %i.0, 1
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%cmp.2 = icmp ult i32 %inc, %N
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br i1 %cmp.2, label %do.body, label %if.end
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if.end: ; preds = %do.body, %entry
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ret void
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}
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; CHECK-LABEL: test11
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; CHECK: entry:
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; CHECK: br label %do.body.preheader
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; CHECK: do.body.preheader:
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; CHECK: [[TEST:%[^ ]+]] = call i1 @llvm.test.set.loop.iterations.i32(i32 %N)
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; CHECK: br i1 [[TEST]], label %do.body.preheader1, label %if.end
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; CHECK: do.body.preheader1:
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; CHECK: br label %do.body
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define void @test11(i1 zeroext %t1, i32* nocapture %a, i32* nocapture readonly %b, i32 %N) {
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entry:
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br label %do.body.preheader
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do.body.preheader:
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%cmp = icmp ne i32 %N, 0
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br i1 %cmp, label %do.body, label %if.end
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do.body:
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%b.addr.0 = phi i32* [ %incdec.ptr, %do.body ], [ %b, %do.body.preheader ]
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%a.addr.0 = phi i32* [ %incdec.ptr3, %do.body ], [ %a, %do.body.preheader ]
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%i.0 = phi i32 [ %inc, %do.body ], [ 0, %do.body.preheader ]
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%incdec.ptr = getelementptr inbounds i32, i32* %b.addr.0, i32 1
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%tmp = load i32, i32* %b.addr.0, align 4
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%incdec.ptr3 = getelementptr inbounds i32, i32* %a.addr.0, i32 1
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store i32 %tmp, i32* %a.addr.0, align 4
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%inc = add nuw i32 %i.0, 1
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%cmp.1 = icmp ult i32 %inc, %N
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br i1 %cmp.1, label %do.body, label %if.end
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if.end: ; preds = %do.body, %entry
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ret void
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}
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