forked from OSchip/llvm-project
cb32792210
Specified in https://github.com/WebAssembly/simd/pull/237, these instructions load the first vector lane from memory and zero the other lanes. Since these instructions are not officially part of the SIMD proposal, they are only available on an opt-in basis via LLVM intrinsics and clang builtin functions. If these instructions are merged to the proposal, this implementation will change so that the instructions will be generated from normal IR. At that point the intrinsics and builtin functions would be removed. This PR also changes the opcodes for the experimental f32x4.qfm{a,s} instructions because their opcodes conflicted with those of the v128.load{32,64}_zero instructions. The new opcodes were chosen to match those used in V8. Differential Revision: https://reviews.llvm.org/D84820 |
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alias.s | ||
annotations.s | ||
array-fill.ll | ||
assembler-binary.ll | ||
atomics-encodings.s | ||
bad-fixup-expr.s | ||
basic-assembly-errors.s | ||
basic-assembly.s | ||
blockaddress.ll | ||
bss.ll | ||
bulk-memory-encodings.s | ||
comdat.ll | ||
compile-twice.ll | ||
custom-code-section.ll | ||
custom-sections.ll | ||
data-section.s | ||
data-symbol-in-text-section.ll | ||
debug-info.ll | ||
debug-localvar.ll | ||
dwarfdump.ll | ||
event-section.ll | ||
explicit-sections.ll | ||
export-name.s | ||
external-data.ll | ||
external-func-address.ll | ||
externref.s | ||
file-headers.ll | ||
func-address.ll | ||
function-alias.ll | ||
function-sections.ll | ||
global-ctor-dtor.ll | ||
globals.s | ||
import-module.s | ||
libcall.ll | ||
lit.local.cfg | ||
no-dead-strip.ll | ||
null-output.s | ||
objdump.s | ||
offset.ll | ||
offset.s | ||
reloc-code.ll | ||
reloc-data.ll | ||
reloc-pic.s | ||
sections.ll | ||
simd-encodings.s | ||
stack-ptr.ll | ||
tail-call-encodings.s | ||
type-index.s | ||
types.ll | ||
unnamed-data.ll | ||
visibility.ll | ||
wasm64.s | ||
weak-alias.s | ||
weak.s |