Bob Wilson 59351844e1 ARM instructions that are both predicated and set the condition codes ... have been printed with the "S" modifier after the predicate. With ARM's unified syntax, they are supposed to go in the other order. We fixed this for Thumb when we switched to unified syntax but missed changing it for ARM. Apparently we don't generate these instructions often because no one noticed until now. Thanks to Bill Wendling for the testcase! llvm-svn: 116563		2010-10-15 03:23:44 +00:00
clang	Don't complain about a variable within a linkage-specification that is	2010-10-15 01:21:46 +00:00
compiler-rt	make: Add CheckCommandLineOverrides to my little Makefile library, a routine for	2010-10-14 21:23:37 +00:00
debuginfo-tests	testcase commit for upcoming fix.	2010-09-21 20:51:54 +00:00
libcxx	Fix two test bugs	2010-10-14 21:08:32 +00:00
lldb	Did a bit of parameter renaming.	2010-10-15 02:45:05 +00:00
llvm	ARM instructions that are both predicated and set the condition codes	2010-10-15 03:23:44 +00:00