forked from OSchip/llvm-project
227 lines
7.5 KiB
C++
227 lines
7.5 KiB
C++
//===-- PPCSubtarget.h - Define Subtarget for the PPC ----------*- C++ -*--===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares the PowerPC specific subclass of TargetSubtargetInfo.
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//
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//===----------------------------------------------------------------------===//
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#ifndef POWERPCSUBTARGET_H
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#define POWERPCSUBTARGET_H
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#include "llvm/ADT/Triple.h"
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#include "llvm/MC/MCInstrItineraries.h"
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#include "llvm/Target/TargetSubtargetInfo.h"
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#include <string>
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#define GET_SUBTARGETINFO_HEADER
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#include "PPCGenSubtargetInfo.inc"
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// GCC #defines PPC on Linux but we use it as our namespace name
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#undef PPC
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namespace llvm {
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class StringRef;
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namespace PPC {
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// -m directive values.
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enum {
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DIR_NONE,
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DIR_32,
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DIR_440,
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DIR_601,
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DIR_602,
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DIR_603,
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DIR_7400,
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DIR_750,
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DIR_970,
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DIR_A2,
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DIR_E500mc,
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DIR_E5500,
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DIR_PWR3,
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DIR_PWR4,
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DIR_PWR5,
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DIR_PWR5X,
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DIR_PWR6,
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DIR_PWR6X,
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DIR_PWR7,
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DIR_64
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};
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}
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class GlobalValue;
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class TargetMachine;
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class PPCSubtarget : public PPCGenSubtargetInfo {
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protected:
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/// stackAlignment - The minimum alignment known to hold of the stack frame on
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/// entry to the function and which must be maintained by every function.
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unsigned StackAlignment;
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/// Selected instruction itineraries (one entry per itinerary class.)
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InstrItineraryData InstrItins;
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/// Which cpu directive was used.
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unsigned DarwinDirective;
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/// Used by the ISel to turn in optimizations for POWER4-derived architectures
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bool HasMFOCRF;
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bool Has64BitSupport;
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bool Use64BitRegs;
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bool IsPPC64;
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bool HasAltivec;
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bool HasQPX;
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bool HasVSX;
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bool HasFCPSGN;
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bool HasFSQRT;
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bool HasFRE, HasFRES, HasFRSQRTE, HasFRSQRTES;
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bool HasRecipPrec;
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bool HasSTFIWX;
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bool HasLFIWAX;
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bool HasFPRND;
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bool HasFPCVT;
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bool HasISEL;
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bool HasPOPCNTD;
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bool HasLDBRX;
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bool IsBookE;
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bool DeprecatedMFTB;
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bool DeprecatedDST;
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bool HasLazyResolverStubs;
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bool IsJITCodeModel;
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bool IsLittleEndian;
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/// TargetTriple - What processor and OS we're targeting.
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Triple TargetTriple;
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public:
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/// This constructor initializes the data members to match that
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/// of the specified triple.
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///
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PPCSubtarget(const std::string &TT, const std::string &CPU,
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const std::string &FS, bool is64Bit);
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/// ParseSubtargetFeatures - Parses features string setting specified
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/// subtarget options. Definition of function is auto generated by tblgen.
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void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
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/// SetJITMode - This is called to inform the subtarget info that we are
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/// producing code for the JIT.
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void SetJITMode();
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/// getStackAlignment - Returns the minimum alignment known to hold of the
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/// stack frame on entry to the function and which must be maintained by every
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/// function for this subtarget.
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unsigned getStackAlignment() const { return StackAlignment; }
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/// getDarwinDirective - Returns the -m directive specified for the cpu.
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///
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unsigned getDarwinDirective() const { return DarwinDirective; }
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/// getInstrItins - Return the instruction itineraies based on subtarget
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/// selection.
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const InstrItineraryData &getInstrItineraryData() const { return InstrItins; }
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/// getDataLayoutString - Return the pointer size and type alignment
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/// properties of this subtarget.
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const char *getDataLayoutString() const {
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// Note, the alignment values for f64 and i64 on ppc64 in Darwin
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// documentation are wrong; these are correct (i.e. "what gcc does").
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if (isPPC64() && isSVR4ABI()) {
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if (TargetTriple.getOS() == llvm::Triple::FreeBSD)
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return "E-p:64:64-f64:64:64-i64:64:64-v128:128:128-n32:64";
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else
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return "E-p:64:64-f64:64:64-i64:64:64-f128:128:128-v128:128:128-n32:64";
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}
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return isPPC64() ? "E-p:64:64-f64:64:64-i64:64:64-f128:64:128-n32:64"
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: "E-p:32:32-f64:64:64-i64:64:64-f128:64:128-n32";
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}
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/// \brief Reset the features for the PowerPC target.
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virtual void resetSubtargetFeatures(const MachineFunction *MF);
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private:
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void initializeEnvironment();
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void resetSubtargetFeatures(StringRef CPU, StringRef FS);
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public:
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/// isPPC64 - Return true if we are generating code for 64-bit pointer mode.
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///
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bool isPPC64() const { return IsPPC64; }
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/// has64BitSupport - Return true if the selected CPU supports 64-bit
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/// instructions, regardless of whether we are in 32-bit or 64-bit mode.
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bool has64BitSupport() const { return Has64BitSupport; }
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/// use64BitRegs - Return true if in 64-bit mode or if we should use 64-bit
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/// registers in 32-bit mode when possible. This can only true if
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/// has64BitSupport() returns true.
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bool use64BitRegs() const { return Use64BitRegs; }
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/// hasLazyResolverStub - Return true if accesses to the specified global have
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/// to go through a dyld lazy resolution stub. This means that an extra load
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/// is required to get the address of the global.
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bool hasLazyResolverStub(const GlobalValue *GV,
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const TargetMachine &TM) const;
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// isJITCodeModel - True if we're generating code for the JIT
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bool isJITCodeModel() const { return IsJITCodeModel; }
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// isLittleEndian - True if generating little-endian code
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bool isLittleEndian() const { return IsLittleEndian; }
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// Specific obvious features.
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bool hasFCPSGN() const { return HasFCPSGN; }
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bool hasFSQRT() const { return HasFSQRT; }
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bool hasFRE() const { return HasFRE; }
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bool hasFRES() const { return HasFRES; }
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bool hasFRSQRTE() const { return HasFRSQRTE; }
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bool hasFRSQRTES() const { return HasFRSQRTES; }
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bool hasRecipPrec() const { return HasRecipPrec; }
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bool hasSTFIWX() const { return HasSTFIWX; }
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bool hasLFIWAX() const { return HasLFIWAX; }
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bool hasFPRND() const { return HasFPRND; }
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bool hasFPCVT() const { return HasFPCVT; }
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bool hasAltivec() const { return HasAltivec; }
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bool hasQPX() const { return HasQPX; }
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bool hasMFOCRF() const { return HasMFOCRF; }
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bool hasISEL() const { return HasISEL; }
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bool hasPOPCNTD() const { return HasPOPCNTD; }
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bool hasLDBRX() const { return HasLDBRX; }
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bool isBookE() const { return IsBookE; }
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bool isDeprecatedMFTB() const { return DeprecatedMFTB; }
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bool isDeprecatedDST() const { return DeprecatedDST; }
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const Triple &getTargetTriple() const { return TargetTriple; }
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/// isDarwin - True if this is any darwin platform.
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bool isDarwin() const { return TargetTriple.isMacOSX(); }
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/// isBGP - True if this is a BG/P platform.
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bool isBGP() const { return TargetTriple.getVendor() == Triple::BGP; }
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/// isBGQ - True if this is a BG/Q platform.
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bool isBGQ() const { return TargetTriple.getVendor() == Triple::BGQ; }
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bool isDarwinABI() const { return isDarwin(); }
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bool isSVR4ABI() const { return !isDarwin(); }
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/// enablePostRAScheduler - True at 'More' optimization.
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bool enablePostRAScheduler(CodeGenOpt::Level OptLevel,
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TargetSubtargetInfo::AntiDepBreakMode& Mode,
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RegClassVector& CriticalPathRCs) const;
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// Scheduling customization.
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bool enableMachineScheduler() const;
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void overrideSchedPolicy(MachineSchedPolicy &Policy,
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MachineInstr *begin,
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MachineInstr *end,
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unsigned NumRegionInstrs) const;
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bool useAA() const;
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};
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} // End llvm namespace
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#endif
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