Luke Geeson 8bf99f1e6f [ARM] Add Cortex-A77 Support for Clang and LLVM ... This patch upstreams support for the Arm-v8 Cortex-A77 processor for AArch64 and ARM. In detail: - Adding cortex-a77 as a cpu option for aarch64 and arm targets in clang - Cortex-A77 CPU name and ProcessorModel in llvm details of the CPU can be found here: https://www.arm.com/products/silicon-ip-cpu/cortex-a/cortex-a77 and a similar submission to GCC can be found here: e0664b7a63 The following people contributed to this patch: - Luke Geeson - Mikhail Maltsev Reviewers: t.p.northover, dmgreen, ostannard, SjoerdMeijer Reviewed By: dmgreen Subscribers: dmgreen, kristof.beyls, hiraditya, danielkiss, cfe-commits, llvm-commits, miyuki Tags: #clang, #llvm Differential Revision: https://reviews.llvm.org/D82887		2020-07-03 13:00:54 +01:00
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AArch64	[ARM] Add Cortex-A77 Support for Clang and LLVM	2020-07-03 13:00:54 +01:00
AMDGPU	[AMDGPU][MC][NFC] Updated and enabled MC lit tests	2020-06-19 16:27:40 +03:00
ARC	[lit] Delete empty lines at the end of lit.local.cfg NFC	2019-06-17 09:51:07 +00:00
ARM	[AArch32] Armv8.6a Matrix Mul Assembly Parsing Support	2020-04-24 15:54:06 +01:00
Hexagon	[lit] Delete empty lines at the end of lit.local.cfg NFC	2019-06-17 09:51:07 +00:00
Lanai	[lit] Delete empty lines at the end of lit.local.cfg NFC	2019-06-17 09:51:07 +00:00
MSP430	[lit] Delete empty lines at the end of lit.local.cfg NFC	2019-06-17 09:51:07 +00:00
Mips	[mips] Implement Octeon+ `saa` and `saad` instructions	2019-11-07 13:58:50 +03:00
PowerPC	[PowerPC]Add Vector Insert Instruction Definitions and MC Test	2020-07-02 15:49:16 -05:00
RISCV	[RISCV] Implement evaluateBranch	2020-04-09 15:11:55 +01:00
Sparc	[lit] Delete empty lines at the end of lit.local.cfg NFC	2019-06-17 09:51:07 +00:00
SystemZ	[SystemZ] Support z15 processor name	2019-09-20 23:04:45 +00:00
WebAssembly	[WebAssembly] Renumber SIMD opcodes	2020-05-01 17:20:49 -07:00
X86	[X86-64] Support Intel AMX instructions	2020-07-02 08:57:04 +08:00
XCore	…