forked from OSchip/llvm-project
d2025a2e31
and (or (lshr X, C), ...), 1 --> (X & C') != 0 I initially thought about implementing the minimal pattern in instcombine as mentioned here: https://bugs.llvm.org/show_bug.cgi?id=37098#c6 ...but we need to do better to catch the more general sequence from the motivating test (more than 2 bits in the compare). And a test-suite run with statistics showed that this pattern only happened 2 times currently. It would potentially happen more often if reassociation worked better (D45842), but it's probably still not too frequent? This is small enough that I didn't see a need to create a whole new class/file within AggressiveInstCombine. There are likely other relatively small matchers like what was discussed in D44266 that would slide under foldUnusualPatterns() (name suggestions welcome). We could potentially also consolidate matchers for ctpop, bswap, etc under here. Differential Revision: https://reviews.llvm.org/D45986 llvm-svn: 331311 |
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| 2010-03-22-empty-baseclass.ll | ||
| PR6627.ll | ||
| basic.ll | ||
| bitfield-bittests.ll | ||
| gdce.ll | ||
| globalaa-retained.ll | ||
| scev-custom-dl.ll | ||
| scev.ll | ||
| simplifycfg-options.ll | ||